Technical data

Lines 6 to 8 (CONTROL BITS)
Control bit Meaning
DX0-FE
Parameter assignment error in DX 0 or DX 2
FE-22
Not used
MOD-FE
Error in contents of user submodule (OVERALL
RESET required)
RAM-FE
Error in contents of system program RAM
or of DB RAM (OVERALL RESET required)
DB0-FE
Structure of block address lists in DB 0 incorrect
DB1-FE
Structure of the address lists in DB 1 for process
image updating is incorrect:
- DB 1 not programmed and coordinator
plugged in or multiprocessor operation
required
- structure or contents of DB 1 incorrect
DB2-FE
Error evaluating the parameter assignment data block
DB 2 of controller structure R64
KOR-FE
Error in data exchange with the coordinator
NAU
Power failure in the central controller
PEU
Peripherals not ready = power failure in expansion
unit
BAU
Battery not ready = back-up battery failure in central
controller
STUE-FE
Interrupt or block stack overflow (nesting depth too
great; COLD RESTART required)
ZYK
Cycle monitoring time exceeded
QVZ
Timeout during data exchange with I/Os
ADF
Addressing error with inputs or outputs:
error caused by accessing the process
image, in which I/O modules were addressed
that were not plugged in, defect or not
specified in DB 1 at the last COLD RESTART
Table 5-5 Meaning of the control bits in lines 6 to 8
Control Bits and Interrupt Stack
CPU 928B Programming Guide
5 - 16 C79000-B8576-C898-01