Technical data

5.6.7
REG-FE (Controller Error)
An error occurring during the processing of the standard function
block for controller structure R64 is detected as a controller error.
Note
While, for example, a collision of time interrupts is always
recognized by the system program, when a particular time
interrupt OB is not started and completed within a particular time
interval (e.g. OB 13 within 100 ms), incorrect processing of the
closed loop control program is only detected when the program
processing level CL CONTROL is
called. The error is then
indicated in the ISTACK.
OB 34 If a controller error occurs, the program processing level CL
CONTROL is exited and the CONTROLLER ERROR (LEVEL:
001CH) level is called with organization block
OB 34.
The subsequent reaction of the CPU depends on how you have
programmed OB 34:
•• If you have not programmed OB 34, the CPU goes into the STOP
mode. You can see the cause of the error by displaying the
ISTACK.
•• If you have programmed OB 34, the STEP 5 program it contains
(e.g. evaluation of ACCU 1 and 2 and then appropriate error
handling) is executed. Following this, the controller processing is
continued from the point at which it was interrupted.
Response to controller errors If you want to ignore all controller errors, simply write the block end
statement BE in OB 34.
If you want the controller processing to continue when a controller
error occurs and you do not program OB 34, change the default in
DX 0.
Errors in RUN and in RESTART
CPU 928B Programming Guide
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