Technical data

6.21 OB 216 to OB 218: Page Access
What are pages? To implement a large number of communications registers, within the
address range of the S5 bus, an address area with a length of 1024
bytes (2048 bytes are reserved) is imaged 256 times on the memory.
Because these 256 images are stored beside or behind each other like
individual "pages", these memory areas are also referred to as a "page
memory".
In multiprocessor operation, all modules involved can only access
one
page of this memory area at any one time, all the remaining pages
must be disabled for both reading and writing.
A page is addressed via a page address register that exists on all
modules operating with pages and that has a fixed address on the S5
bus. You set the numbers (addresses) of the pages on each of these
modules using a DIL switch, so that each page can only exists once in
the PLC.
Before reading or writing to a page, the CPU specifies the page
number by writing to the page address register. All the modules that
operate according to this procedure of the S5 bus receive this number
simultaneously ("broadcast") and store it in their memory. Only the
page addressed in this way can be written to or read from in the page
memory of the S5 bus, all other pages are disabled.
OB 216 to OB 218: Page Access
CPU 928B Programming Guide
6 - 78 C79000-B8576-C898-01