Technical data

Address areas for
peripherals on the S5 bus
Page length Address area occupied
1024 addresses (byte or word
addresses)
2048 addresses (byte or word
addresses)
F400H - F7FFH
F400H - FBFFH
Bit
F000
0
F100
F200
F300
F400
FC00
FEFF
FF00
FFFF
.
Page no. 0
1
2
7
P area
O area
IPC flags on
Distributed peripherals
Address space of a page
coordinator
System area
(semaphores)
(or free)
3
Multiple memory area
Length: 1024 or 2048 bytes
Page address register
Page no. 255
on the coordinator
not occupied
Fig. 6-11 Location of the page address area on the S5 bus
OB 216 to OB 218: Page Access
CPU 928B Programming Guide
6 - 80 C79000-B8576-C898-01