Technical data

8.2.2
Address Distribution of
the Peripherals
2048 bits extended peripherals
IM 3 area
IM 4 area
Digital peripherals (with process image),
1024 bits inputs / 1024 bits outputs
Digital or analog
peripherals (without process image),
1024 bits inputs / 1024 bits outputs
F000
F080
F100
F200
F300
F400
FC00
FDFF
FD00
FCFF
FF00
FFFF
Parea
Oarea
F07F
F08F
F1FF
F2FF
F3FF
FBFF
FEFF
FE00
Reserved
Distributed peripherals,
extended address volume
2048 bits IPC flags
(on coordinator module/CP)
Data transfer area
for CP (pages)
32 semaphores
(on coordinator module)
Bit no.
7
0
Page area
Fig. 8-3 Address distribution - peripherals (8 bits) on the S5 bus
8
Address Distribution in the CPU 928B
CPU 928B Programming Guide
C79000-B8576-C898-01
8 - 7