Technical data

RS 131 Condition codeword "disable all interrupts": see OB 120
(Section 6.5)
Address EA83 (low)
The system data RS 131 indicates the following statuses of the
program processing levels "interrupt processing".
Bit no. Low byte: Disable all interrupts
7
0
6
0
5
0
4
0
3
Delay interrupt
2
Process interrupts
1
Clock-driven time interrupt
0
Time interrupts at fixed intervals
Bit = 1 means: interrupt(s) is (are) disabled.
RS 132 Condition codeword "delay all interrupts": see OB 122
(Section 6.7)
The system data RS 132 indicates the following statuses of the
program processing levels "interrupt processing".
Bit no. Low byte: Delay all interrupts
7
0
6
0
5
0
4
0
3
Delay interrupt
2
Process interrupts
1
Clock-driven time interrupt
0
Time interrupts at fixed intervals
Bit = 1 means: interrupt(s) is (are) delayed
Table 8-10 Assignment of RS 131 (Disable all interrupts)
Table 8-11 Assignment of RS 132 (Delay all interrupts)
8
User Memory Organization in the CPU 928B
CPU 928B Programming Guide
C79000-B8576-C898-01
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