Technical data

RS 144 "Alternative loading of data blocks into DB RAM"
Address EA90
In the CPU 928B, all blocks are first loaded by the programmer into
the user memory submodule as standard. Only when there is no more
memory space there, are the
data blocks (DBs, DXs) and only the
data blocks loaded into DB RAM.
You can influence the order of loading data blocks via bit no. 0 of
system data word RS 144:
Bit 0 = 0: Default "Standard behavior":
The data blocks are loaded into the user memory
submodule first. Only when there is no more
space there, are they loaded into DB RAM.
Bit 0 = 1: The data blocks are loaded into DB RAM first.
Only when there is no more space there, are they
loaded into the user memory submodule.
The remaining bits of RS 144 are not assigned.
Note
Code blocks are loaded into the user memory regardless of the
setting in RS 144.
The setting in RS 144 has no influence on operations and special
function OBs for generating and reloading blocks.
User Memory Organization in the CPU 928B
CPU 928B Programming Guide
8 - 34 C79000-B8576-C898-01