Technical data

The CPU tests and sets a busy location using the TSG operation.
Operation Operand Explanation
TSG -32768 to
+32767
Add the specified constant to the
content of the BR register and test and
set the location addressed in this way.
Sequence The low byte of the word addressed by the contents of the BR register
+ the constant is used as the busy location. If the content of the low
byte is "0", the TSG operation enters the slot ID (from RS 29) into the
busy location.
Testing (= reading) and setting (= writing) the busy location is one
program unit that cannot be interrupted.
Result You can evaluate the result of the test in condition codes CC 0 and
CC 1, as follows:
CC 1 CC 0 Explanation
0
1
0
0
0
1
The busy location contains the value
"0"; the CPU enters its slot ID.
The CPU’s own slot ID is already
entered in the busy location.
The busy location contains a different
slot ID.
Note
All
CPUs that require synchronized access to a common global
memory area
must use the TSG operation.
Permissible address area The absolute address must be between 0000H and EFFFH.
Error reaction If the calculated address of the memory location is not in the range
shown, the CPU detects a runtime error and calls
OB 31, providing it
is loaded. If OB 31 is not loaded, the CPU goes to the stop mode.
In both cases, error IDs are entered in ACCU-1-L, that define the error
in greater detail (see Section 5.6.2).
Operations with the Base Address Register (BR Register)
CPU 928B Programming Guide
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