Technical data

Table 8-11 Assignment of RS 132 (Delay all interrupts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 - 29

Table 8-12 Assignment of RS 133 (Process image updating) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 - 30

Table 8-13 Assignment of RS 135 (Disable individual time interrupts) . . . . . . . . . . . . . . . . . . . . . . 8 - 31

Table 8-14 Assignment of RS 137 (Delay individual time interrupts). . . . . . . . . . . . . . . . . . . . . . . . 8 - 32

Table 8-15 Assignment of RS 140 (Write/read IDs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 - 33

Table 9-1 Operations for indirect memory access using registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 8

Table 9-2 16-bit register for LIR/TIR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 9

Table 9-3 Operations for field transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 18

Table 9-4 Memory areas permitted for TNW, TXB and TXW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 18

Table 9-5 Load and arithmetic operations with the BR register. . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 26

Table 9-6 Operations for transfer between registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 27

Table 9-7 Operations for accessing the local memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 28

Table 9-8 Operations for access to the global memory organized in bytes . . . . . . . . . . . . . . . . . . . 9 - 31

Table 9-9 Operations for access to the global memory organized in words . . . . . . . . . . . . . . . . . . 9 - 32

Table 9-10 Operations for access to the pages organized in bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 35

Table 9-11 Operations for access to the pages organized in words . . . . . . . . . . . . . . . . . . . . . . . . . . 9 - 37

Table 10-1 Condition codes of the communication OBs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 - 23

Table 10-2 Code byte for the communication OBs/number groups. . . . . . . . . . . . . . . . . . . . . . . . 10 - 24

Table 10-3 Condition code byte: Initialization conflict numbers. . . . . . . . . . . . . . . . . . . . . . . . . . 10 - 25

Table 10-4 Condition code byte: Error numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 - 26

Table 10-5 Condition code bytes: Warning numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 - 28

Table 10-6 Runtimes of the communication OBs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 - 29

List of Tables and Figures

CPU 928B Programming Guide

C79000-T8576-C898-01

14 - 15