Specifications

IP 240 IP 252 Expansion
9.2 Data Interchange between S5 CPU -- IP 240 -- IP 252
During operation, data traffic between the IP 240 and the IP 252 is controlled by the closed-loop
control module. CPU access to the backplane bus is prevented during the data interchange.
The following data is stored by the IP 240, on request, in a transfer buffer on the IP 240 which can
be read by the IP 252:
• Direction on rotation
• Count
• Interval since the last count
• Wirebreak/short-circuit in the lines of encoders with symmetrical pulse trains.
The closed-loop control module computes the actual speed from the data transferred.
CPU access to the IP 240 is not possible during operation. No control function block is therefore
available.
Configuring of the IP 240 takes place as for the other modes during execution of restart blocks
OB21 and OB22.
Configuring
in the restart
OBs
Data
requests
CPU IP 252 AA/AE
IP 240
Initialization, setpoints and actual
values, status data
Configuring
Initialization
+
PG 635/675/685/695/750
COM REG
Data
output
Fig. 9-4. Data Interchange between S5 CPU - IP 240 - IP 252
Note
The digital outputs of the IP 240 cannot be driven in IP 252 expansion mode.
EWA 4NEB 811 6120-02a 9-3