Specifications

CPU Memory: Data Types and Addressing Modes
5-18
S7-200 Programmable Controller System Manual
C79000-G7076-C233-01
At power on, the CPU checks the RAM to verify that the super capacitor
successfully maintained the data stored in RAM memory. If the RAM was
successfully maintained, the retentive areas of RAM are left unchanged. As shown
in Figure 5-16, the non-retentive areas of V memory are restored from the
corresponding permanent area of V memory in the EEPROM.
RAM EEPROM (Permanent)
User program
V memory
CPU configuration
M memory
Timer and counter
current values
All other non-retentive
areas of memory are
set to 0.
The corresponding areas of
permanent V memory are copied
to the non-retentive areas of
V memory in RAM.
User program
V memory
(permanent area)
CPU configuration
M memory
(permanent area)
Figure 5-16 Restoring Program Data on Power On (Data Was Successfully Maintained in
RAM)
If the contents of the RAM were not maintained (such as after an extended power
failure), the CPU clears the RAM (including both the retentive and non-retentive
ranges) and sets the Retentive Data Lost memory bit (SM0.2) for the first scan
cycle following power on. As shown in Figure 5-17, the data stored in the
permanent EEPROM are then copied to the RAM.
RAM EEPROM (Permanent)
User program
V memory
CPU configuration
M memory
Timer and counter
current values
User program
V memory
(permanent area)
CPU configuration
M memory
(permanent area)
V memory (permanent area)
M memory (permanent area), if
defined as retentive
All other areas of memory
are set to 0.
Figure 5-17 Restoring Program Data on Power On (Data Not Maintained in RAM)