Specifications

CPU Memory: Data Types and Addressing Modes
5-19
S7-200 Programmable Controller System Manual
C79000-G7076-C233-01
Defining Retentive Ranges of Memory
You can define up to six retentive ranges to select the areas of memory you want
to retain through power cycles (see Figure 5-18). You can define ranges of
addresses in the following memory areas to be retentive: V, M, C, and T. For
timers, only the retentive timers (TONR) can be retained. In STEP 7-Micro/WIN 32
the default is that M memory is defined as non-retentive. The default disables the
power down save feature of the CPU.
Note
Only the current values for timers and counters can be retained: the timer and
counter bits are not retentive.
To define the retentive ranges for the memory areas, select the
View System Block menu command and click the Retentive Ranges tab. The
dialog box for defining specific ranges to be retentive is shown in Figure 5-18. To
obtain the default retentive ranges for your CPU, press the Defaults button.
System Block
OK Cancel
Defaults
Configuration parameters must be downloaded before they take effect.
Not all PLC types support every System Block option. Press F1 to see which options
are supported by each PLC.
Range 1:
Clear
Range 2:
Clear
Range 3:
Clear
Range 4:
Clear
Range 5:
Clear
Range 0:
Clear
Data Area Offset
Number of
Elements
Apply
Password
Port(s)
Retentive Ranges
Analog Input Filters Pulse Catch Bits Background Time
Output Table Input Filters
VB
VB
T
T
C
MB
0
0
0
64
0
14
5120
0
32
32
256
18
Figure 5-18 Configuring the Retentive Ranges for the CPU Memory