Specifications

Special Memory (SM) Bits
C-10
S7-200 Programmable Controller System Manual
C79000-G7076-C233-01
Table C-14 Special Memory Bytes SMB36 to SMB65
SM Byte Description
SM47.7 HSC1 enable bit: 1 = enable
SMB48
SMB49
SMB50
SMB51
HSC1 new current value
SMB48 is most significant byte, and SMB51 is least significant byte.
SMB52 to
SMB55
HSC1 new preset value
SMB52 is most significant byte, and SMB55 is least significant byte.
SM56.0 to
SM56.4
Reserved
SM56.5 HSC2 current counting direction status bit: 1 = counting up
SM56.6 HSC2 current value equals preset value status bit: 1 = equal
SM56.7 HSC2 current value is greater than preset value status bit: 1 = greater than
SM57.0 HSC2 active level control bit for reset: 0 = active high, 1 = active low
SM57.1 HSC2 active level control bit for start: 0 = active high, 1 = active low
SM57.2 HSC2 quadrature counter rate selection: 0 = 4x rate, 1 = 1x rate
SM57.3 HSC2 direction control bit: 1 = count up
SM57.4 HSC2 update the direction: 1 = update direction
SM57.5 HSC2 update the preset value: 1 = write new preset value to HSC2 preset
SM57.6 HSC2 update the current value: 1 = write new current value to HSC2 current
SM57.7 HSC2 enable bit: 1 = enable
SMB58
SMB59
SMB60
SMB61
HSC2 new current value
SMB58 is the most significant byte, and SMB61 is the least significant byte.
SMB62
SMB63
SMB64
SMB65
HSC2 new preset value
SMB62 is the most significant byte, and SMB65 is the least significant byte.