User's Manual

Bluegiga Technologies Oy
Page 41 of 52
15.4 Low Voltage Linear Regulators
BT111 has three integrated low voltage linear regulators providing the internal supply voltages for RF and
digital circuits of BT111. The input voltage range is between 1.70V and 1.95V.
15.5 Powering Sequence
All the power supplies should be powered at the same time. The order of powering the supplies relative to the
I/O supply, VDD_PADS to VDD_HOST, is not important. If the I/O supply is powered before VDD_DIG, all
digital I/Os are weak pull-downs irrespective of the reset state.
15.6 Reset
The reset function is internally tied to the VREG_EN_RST# pin. BT111 is reset from several sources:
 VREG_EN_RST# pin
 Power-on reset
 Via a software-configured watchdog timer
The VREG_EN_RST# pin is an active low reset. Assert the reset signal for a period >5ms to ensure a full
reset.
Important Note:
Bluegiga does not recommend assertions of the reset of <5ms on the VREG_EN_RST# pin, as any glitches
on this line can affect I/O integrity without triggering a reset.
A warm reset function is also available under software control. After a warm reset the RAM data remains
available.
Pin Name/Group I/O Type No Core Supply Reset Full Chip Reset
VREG_EN_RST# Digital input
Strong pull-down N/A
SPI_CLK/PCM_CLK /
PIO[24]
Digital bidirectional
tristated
Weak pull-down Weak pull-down
SPI_CS# / PCM_SYNC /
PIO[23]
Digital bidirectional
tristated
Weak pull-up (SPI)
Weak pull-down (PCM)
Weak pull-up (SPI)
Weak pull-down (PCM /
PIO)
SPI_MISO / PCM_OUT /
PIO[22]
Digital output tristated
Weak pull-down Weak pull-down
SPI_MOSI / PCM_OUT /
PIO[21]
Digital input
Weak pull-down Weak pull-down
PIO[5:0]
Digital bidirectional
tristated
Weak pull-down Weak pull-down
Table 24: Digital Pin States on Reset