WT32i BLUETOOTH AUDIO MODULE PRELIMINARY DATA SHEET Monday, 11 November 2013 Version 0.
Copyright © 2000-2013 Bluegiga Technologies All rights reserved. Bluegiga Technologies assumes no responsibility for any errors which may appear in this manual. Furthermore, Bluegiga Technologies reserves the right to alter the hardware, software, and/or specifications detailed here at any time without notice and does not make any commitment to update the information contained here. Bluegiga’s products are not authorized for use as critical components in life support devices or systems.
VERSION HISTORY VERSION COMMENT 0.1 Draft 0.
TABLE OF CONTENTS 1 WT32i Product Numbering ........................................................................................................................... 7 2 Block diagram ............................................................................................................................................... 8 3 Pinout and Terminal Description ..................................................................................................................
9.1.4 Line Input ..................................................................................................................................... 38 9.1.5 Output Stage ................................................................................................................................ 39 9.1.6 Mono Operation ........................................................................................................................... 41 9.1.7 Side Tone ....................................
WT32i Bluetooth® Audio Module DESCRIPTION KEY FEATURES: WT32i is the latest generation of Bluetooth modules. It provides highest level of integration with integrated 2.4GHz radio, DSP, battery charger, stereo codec, and antenna ready to hit mono and stereo audio applications. WT32i is also ready to support the latest Bluetooth 3.0 standard.
1 WT32i Product Numbering WT32i-A-AI Fimrware AI5 C = = HW version A = E = iWRAP 5.0.2 custom Chip antenna, industrial temperature range W.
2 Block diagram Flash BC05-MM UART/USB RAM Antenna Balanced filtter 2.4 GHz Radio Baseband DSP PIO I/O Audio In/Out MCU PCM/I2S Kalimba DSP SPI XTAL Reset circuitry Figure 1: Block Diagram of WT32i BC05-MM The BlueCore®5-Multimedia External is a single-chip radio and baseband IC for Bluetooth 2.4GHz systems. It provides a fully compliant Bluetooth v3.0 specification system for data and voice.
3 Pinout and Terminal Description 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 AUDIO_OUT_P_LEFT AUDIO_OUT_N_LEFT GND AUDIO_OUT_P_RIGHT AUDIO_OUT_N_RIGHT AUDIO_IN_N_LEFT AUDIO_IN_P_LEFT GND AUDIO_IN_N_RIGHT AUDIO_IN_P_RIGHT MIC_BIAS GND VDD_CHG VDD_BAT LED0 SPI_MOSI SPI_MISO SPI_CLK SPI_NCSB GND GND RESET UART_NRTS UART_NCTS PIO8 PIO7 PIO6 PIO5 PIO4 PCM_IN PCM_OUT PCM_SYNC PCM_CLK 18 19 20 21 22 23 24 25 26 27 28 29 30 VREG_ENA GND GND GND AIO0 AIO1 PIO0 PIO1 PIO2 PIO3 USB_DUSB_D+ PIO9 PIO10 UART_RXD UART_
Pin Number Pin Name 19 RESET 5 AIO0 Pin Type Description RESET Active high reset. If not used, leave floating. When connected, make sure that the reset is either pulled high or floating (connected to high impedance) during boot. Configurable I/O AIO0 and AIO1 can be used to read the voltage level through the internal ADC (refer to iWRAP User Guide for details). AIO pins can also be configured to be used as general digital IO pins through PS settings.
34 SPI_MISO 35 SPI_MOSI 36 LED0 CMOS Input, weak internal pull-down CMOS output, tristate, weak internal pull-down SPI data input SPI data output Open drain output LED driver Table 2: Terminal Descriptions Pin Number Pin Name Pin Type 40 41 42 44 45 46 47 49 50 MIC_BIAS AUDIO_IN_P_RIGHT AUDIO_IN_N_RIGHT AUDIO_IN_P_LEFT AUDIO_IN_N_LEFT AUDIO_OUT_N_RIGHT AUDIO_OUT_P_RIGHT AUDIO_OUT_N_LEFT AUDIO_OUT_P_LEFT Analog Analog Analog Analog Analog Analog Analog Analog Analog 26 PCM_IN / I2S IN 27
4 Electrical Characteristics 4.1 Absolute Maximum Ratings Storage temperature range Operating temperature range VDD_IO VDD_BAT VDD_CHG Digital Terminal voltages AIO voltages Min Max Unit -40 -40 -0.4 -0.4 -0.4 VSS - 0.4V VSS - 0.4V +85 +85 3.6 4.4 6.5 VDD + 0.4V 1.9V °C V V V V V °C Table 4: Absolute Maximum Ratings 4.2 Recommended Operating Conditions Storage temperature range Operating temperature range VDD_IO VDD_BAT VDD_CHG Digital Terminal voltages AIO voltages Min Max Unit -40 -40 1.
4.4 Audio Characteristics 4.4.1 ADC Parameter Conditions Min Typ Max Unit - - - 16 Bits - 8 - 44.1 kHz 8kHz - 79 - dB 11.025kHz - 77 - dB 16kHz - 76 - dB 22.050kHz 32kHz - 76 75 - dB dB Resolution Input Sample Rate, Fsample Fsample Signal to Noise Ratio, SNR 44.
THD+N 16Ω Load - - 0.1 % THD+N 100Ω Load - - 0.01 % Table 8: DAC Characteristics 4.4.3 A2DP Codecs 4.4.3.1 SBC SBC codec is the default codec used for Bluetooth A2DP connections. Any Bluetooth device supporting A2DP audio profile supports SBC codec. SBC was originally design to provide reasonable good audio quality while keeping low computational complexity. SBC does not require high bit rates. Thus it works sufficiently with Bluetooth where the bandwidth and the processing power are limited.
4.4.3.3 AAC AAC (Advanced Audio Coding) achieves better sound quality than MP3 and it is the default audio format for YouTube and iPhone among others. AAC has long latency (>100ms) compared to aptX®. Because of high processing capacity requirement for encoding, WT32i does not support AAC as A2DP source. Thus WT32i can be used for receiving (A2DP sink) AAC (from iPhone for example) but it can not transmit AAC coded audio.
4.5 RF Characteristics 4.5.1 RF Transceiver Transceiver characteristic Min Typ Max Maximum transmit power Minimum transmit power 4.5 6 -17 7.5 Transmit power stability over the temperature range dB 1 -90 -91 -86 -83 -84 -80 dBm dBm +/- 0.
Band / Frequency Standard Min (AVG / PEAK) Unit 54 / 74 dBuV/m 54 / 74 dBuV/m Band edge 2390MHz 54 / 74 dBuV/m Band edge 2483.5MHz 54 / 74 dBuV/m Band edge 2400MHz (conducted) -20 dBc Band edge 2483.
0 dB -5 dB -10 dB -15 dB -20 dB Figure 4: Top view radiation pattern of DKWT32i -2 dB -4 dB -6 dB -8 dB -10 dB -12 dB -14 dB Figure 5: Side view radiation pattern of DKWT32i Bluegiga Technologies Oy Page 18 of 64
-1 dB -2 dB -3 dB -4 dB -5 dB -6 dB -7 dB -8 dB -9 dB -10 dB -11 dB -12 dB Figure 6: Front view radiation pattern Bluegiga Technologies Oy Page 19 of 64
4.
5 Power Control and Regulation WT32i contains an internal battery charger and a switch mode regulator that is mainly used for internal blocks of the module. The module can be powered from a single 3.3 V supply provided that VDD_CHG is floating. Alternatively the module can be powered from a battery connected to VDD_BAT and using an external regulator for VDD_IO. 1.8 V to 3.3 V supply voltage for VDD_IO can be used to give desired signal levels for the digital interfaces of the module.
Battery Voltage (2.7V...4.4V) VDD_BAT ON/OFF Button VREG_ENA IN R1 LDO (1.8V...3.6V) EN VDD_IO 100k C1 4u7 R2 GPIO (holds the external LDO on) 100k Figure 8: Example of making a power on/off button using the latch feature of the internal regulators iWRAP Example: Creating an on/off button with PIO2 holding the external regulator on “SET CONTROL VREGEN 2 4” (PIO is defined with a bit mask.
Battery Voltage (2.7V...4.4V) VDD_BAT VREG_ENA IN On/Off cntrl LDO EN (1.8V...3.6V) VDD_IO Battery Voltage (2.7V...4.4V) VDD_BAT VREG_ENA IN On/Off cntrl LDO (1.8V...3.6V) EN VDD_IO Figure 9: Correct and wrong connection for the power on/off control 5.1 Reset WT32i may be reset from several sources: reset pin, power on reset, a UART break character or through software configured watchdog timer. At reset, the digital I/O pins are set to inputs for bi-directional pins and outputs are tri-state.
Pin Name / Group I/O Type No Core Voltage Reset Full Chip Reset USB UART_RX UART_CTS UART_TX UART_RTS SPI_MOSI SPI_CLK Digital bi-directional N/A N/A Digital input with PD PD PD Digital output with PU PU PU PD PD PU PU PD PD PD PD SPI_MISO SPI_CS PCM_IN PCM_CLK PCM_SYNC PCM_OUT GPIO Digital input with PD Digital tristate output with PD Digital input with PU Digital input with PD Digital bi-directional with PD Digital tri-state output with PD Digital bi-directional with PU/PD Table 13:
WT32i Reset BC05 22nF BC05 R1 Reset 220k Figure 10: Embedded POR of WT32i Host CPU WT32i GPIO Reset Figure 11: An example how to connect CPU GPIO to the reset pin of the module Bluegiga Technologies Oy Page 25 of 64
6 Battery Charger The battery charger is a constant current / constant voltage charger circuit, and is suitable for lithium ion/polymer batteries only. It shares a connection to the battery terminal, VDD_BAT, with the switch-mode regulator. The charger is initially calibrated by Bluegiga Technologies to have Vfloat = 4.15V - 4.2 V. The constant current level can be varied to allow charging of different capacity batteries.
7 GPIO and AIO Functions 7.1 iWRAP supported GPIO Functions Various GPIO functions are supported by iWRAP.
BT_ACTIVE WLAN_DENY Coexistence scheme Timing signals TX/RX PIO control it should pre-empt the WT32i transaction. Indicates to the PTA that WT32i is initiating a transaction Used by the PTA to deny transmission by WT32i before it starts. WT32i will abort a pending transaction if the WLAN_DENY signal is detected during a specific monitoring period. Defines the coexistence scheme used. This signal is not configurable.
7.3 Outputting Internal Clocks Internal clocks can be routed to either AIO0 or AIO1 by setting PS Keys. To route internal clock to AIO0 set PSKEY_AMUX_AIO0 to 0x00fe. Following table shows how to set the PSKEY_AMUX_CLOCK to get certain frequency from AIO0. AMUX_CLOCK Freq (MHz) @ AIO0 0x0014 0x0004 0x0013 0x0017 0x0003 0x0016 0x0007 0x0011 0x0006 0x0002 0x0009 0x0005 1 2 3 4 6 6.5 8 12 13 16 24 32 Table 15: Selectable internal clock frequencies from AIO0 iWRAP does not support this feature.
8 Serial Interfaces 8.1 UART Interface WT32i has a standard UART serial interface that provides a simple mechanism for communicating with other serial devices using the RS232 protocol. UART configuration parameters, such as baud rate, parity and stop bits can be configured with an iWRAP command. The hardware flow control is enabled by default. HW flow control can be disabled in HW by connecting UART_NCTS to GND and leaving UART_NRTS floating.
8.1.1 Resetting Through UART Break Signal The UART interface can reset WT32i on reception of a break signal. A break is identified by a continuous logic low (0V) on the UART_RX terminal. If tBRK is longer than the value, defined by PSKEY_HOSTIO_UART_RESET_TIMEOUT, a reset occurs. This feature allows a host to initialise the system to a known state. Also, WT32i can emit a break character that may be used to wake the host.
WT32i can be used as bus-powered or self-powered device. See the WT_USB_Design_Guide available in the Bluegiga techforum for details about the SW and HW configuration of the USB interface.
WT32i VDD_IO VDD_IO Figure 16: Self powered WT32i device configuration 8.3 Programming and Debug Interface (SPI) The synchronous serial port interface (SPI) is for interfacing with other digital devices. The SPI port can be used for system debugging. It can also be used for programming the Flash memory. SPI interface is connected by using the MOSI, MISO, CSB and CLK pins. SPI interface can not be used for any application purposes.
9 Audio Interfaces 9.1 Stereo Audio Codec Interface Stereo audio CODEC operates from an internal 1.5V power supply. It uses fully differential architecture in analog signal path for the best possible common mode noise rejection while effectively doubling the signal amplitude. The stereo audio bus standard I2S is supported and a software I2C interface can be implemented using GPIOs to configure an external audio CODEC. Figure 17: Stereo CODEC input and output stages 9.1.
Preamp ON = 24 dB gain (MIC input) Preamp OFF = 0 dB gain (line input) iWRAP Gain Setting (-27...
9.1.2 DAC The DAC consists of two second-order sigma-delta converters and gain stages. The gain stage consists of digital and analog gain stages which are controlled by iWRAP. The optimal combination of digital and analog gain is automatically selected by iWRAP. The analog gain stage consist selectable 24 dB preamplifier for selecting microphone or line input levels and an amplifier which can be configured in 3 dB steps. The iWRAP gain selection values are shown in Table 20.
9.1.3 Microphone Input Figure 18 shows the recommended microphone biasing. The microphone bias, MIC_BIAS, derives its power from the VDD_BAT and requires 1uF capacitor on its output (C1). The input impedance at AUDIO_IN_P_LEFT and AUDIO_IN_N_LEFT is typically 6kohm and C5 and C4 are typically 1uF. If bass roll-off is required to limit the wind noise on the microphone then C4 and C5 should be 150 nF.
4 5 6 7 8 9 A B C D E F 0.480 0.530 0.610 0.670 0.750 0.810 0.860 0.950 1.000 1.090 1.140 1.230 1.95 2.02 2.10 2.18 2.32 2.43 2.56 2.69 2.90 3.08 3.33 3.57 Table 21: MIC_BIAS settings in iWRAP 9.1.4 Line Input Line input mode is selected by setting the ADC preamplifier off (see chapter 9.1.1). In the line input mode the input impedance varies from 6k to 30 kohm depending on the gain setting. Figure 19 and Figure 20 show examples of line input connection with WT32i.
WT32i Line input P C1 R1 AUDIO_IN_P_LEFT R2 Line input N C2 AUDIO_IN_N_LEFT Figure 20: Differential line input example 9.1.5 Output Stage The output stage digital circuitry converts the signal from 16-bit per sample, linear PCM of variable sampling frequency to bit stream, which is fed into the analogue output circuitry. The output stage circuit comprises a DAC with gain setting and class AB output stage amplifier.
WT32i AUDIO_OUT_P_LEFT AUDIO_OUT_N_LEFT Figure 21: Differentially connected speaker WT32i AUDIO_OUT_P_LEFT C1 AUDIO_OUT_N_LEFT Figure 22: Single-ended speaker connection Bluegiga Technologies Oy Page 40 of 64
9.1.6 Mono Operation Mono operation is a single-channel operation of the stereo codec. The left channel represents the single mono channel for audio in and audio out. In mono operation the right channel is the auxiliary mono channel that may be used in dual mono channel operation. Dual mono feature is FW dependent and iWRAP does not generally support it. 9.1.7 Side Tone In some applications it is necessary to implement side tone.
I2S CODEC MCLK Generator ASI SCK WS WT32i I2S_IN I2S_OUT Figure 23: I2S scheme for WT32i Bit Mask Name D[0] 0x0001 CONFIG_JUSTIFY_FORMAT Description 0 for left justified, 1 for right justified. D[1] 0x0002 CONFIG_LEFT_JUSTIFY_DELAY For left justified formats: 0 is MSB of SD data occurs in the first SCLK period following WS transition. 1 is MSB of SD data occurs in the second SCLK period. D[2] 0x0004 CONFIG_CHANNEL_POLARITY For 0, SD data is left channel when WS is high.
Figure 24: Digital Audio Interface Modes 9.4 IEC 60958 Interface The IEC 60958 interface is a digital audio interface that uses bi-phase coding to minimize the DC content of the transmitted signal and allows the receiver to decode the clock information from the transmitted signal. The IEC 60958 specification is based on the 2 industry standards: AES/EBU Sony and Philips interface specification SPDIF The interface is compatible with IEC 60958-1, IEC 60958-3 and IEC 60958-4.
DC bias f or the comparator input R1 4 1 u F/6 .3 V/X5 R/1 0 % 0 .1 5 u F/1 0 V/X5 R 5 C6 1 u F/6 .3 V/X5 R/1 0 % C4 1 + 3 - C2 4 SPD IF_ IN 2 R1 2 Impedance matching to 75 ohm R 15 1 0 K, 5 0 V, 0 .0 6 3 W R1 3 1 0 K, 5 0 V, 0 .0 6 3 W 1 .0 K, 5 0 V, 0 .0 6 3 W C5 0 .1 5 u F/1 0 V/X5 R C7 1 .0 K, 5 0 V, 0 .0 6 3 W 3 V3 MCP6541U D1 13 R1 1 4 7 0 K, 5 0 V, 0 .0 6 3 W 3 V3 2 1 5 0 R, 5 0 V, 0 .0 6 3 W R6 R5 1 5 0 R, 5 0 V, 0 .
10 Design Guidelines This chapter shows briefly the most important points to consider when making a design with WT32i. Please refer to the DKWT32i datasheet for detailed description of the development board design. 10.1 Audio Layout Guide 10.1.1 EMC Considerations To avoid RF noise coupling top the audio traces it is extremely important to make sure that there aren’t GND loops in the audio traces. Audio layout can not be compromised.
difference between the different capacitors is obvious at low frequencies where the impedance of the capacitor is dominant. Figure 27: Modulation distortion with different type of capacitors 10.2 RF Layout Guide The chip antenna of WT32i requires only a small metal clearance area directly under the antenna. The antenna operation is dependent on the GND planes on both sides of the antenna.
Board edge Min 15mm Min 15mm 6mm Metal clearance area GND plane indentation 2mm GND plane indentation max 5.9 mm Figure 28: Recommended layout for WT32i Figure 29: Poor layouts for WT32i Use good layout practices to avoid excessive noise coupling to supply voltage traces or sensitive analog signal traces. If using overlapping ground planes use stitching vias separated by max 3 mm to avoid emission from the edges of the PCB.
– – –A good practice is to dedicate one of the inner layers to a solid GND plane and one of the inner layers to supply voltage planes and traces and route all the signals on top and bottom layers of the PCB. This arrangement will make sure that any return current follows the forward current as close as possible and any loops are minimized.
10.3 Example Application Schematics 470 uF capacitor is required if it is likely that the battery can be removed. If the battery is not placed and the charger is enabled, the charger will become unstable causing damage to the module BATTERY 1 2 MOD2 GENERAL_SPEAKER D2 The charger LED will blink even if the module is not powered.
NOTE: Differential audio provides excellent common mode rejection and effectively douples the amplitude. Thus it is strongly recommendable to use differential instead of single ended when ever possible C26 2TIP 330uF/6.3V/20% /TAN/ESR<10mohm C28 3 RING 1 SLEEVE J2 SJ-3523-SMT-TR U2 TPS79933 EN OUT NR 5 4 R11 R12 R17 1 L4 15nH 2.2K, 50V, 0.063W C21 1uF/X7R 2 1 2 7.5K, 50V, 0.063W R15 1 L3 15nH 2 TIP 3 RING 1 SLEEVE 2 7.5K, 50V, 0.
3V3 C3 0.1uF/10V/X5R/10% C4 10uF/6.3V/X5R/10% C68 33pF - R7 3 2 1 1 2 + 33nH 330uF/TANTALUM R9 30k 15K 1uF/X7R L12 C12 2 C6 R62 1uF/X7R 15K 1uF/X7R A_OUT_LEFT_P 2 10 R6 1 1 30k C5 A_OUT_LEFT_N 2 150K C60 1M, 50V , 0.1W, 5% 2 2 NP R52 1 R4 1 R69 C58 5.0pF 0.1uF/10V /X 5R/10% C69 2 TIP 3 RING 1 SLEEVE 1 C9 4 2 MIDRAIL 30k R8 C7 1uF/X 7R 1 + R5 C57 2 1 1uF/X7R 30k R71 1 2 150K C70 5.0pF NP 0.
3V3 MOD1 WT32I 5 VDD RST VSS 4 MR RST 1 3V3 3V3 J7 1 2 3 4 5 6 18 19 20 21 22 23 24 25 26 27 28 29 30 R 37 5.1K, 50V, 0.
11 Physical Dimensions FCC ID: QOQWT32I IC: 5123A-BGTWT32I KCC-CRM-BGT-WT32I 3.35 mm 15.0 (+/-0.1) mm 9.15 mm Model: WT32i-A Ant 3.8 mm R 209-JXXXXX 17.9 (+/-0.1) mm 23.9 (+/-0.2) mm 2.4 (+/-0.15) mm 5.6 (+/-0.2) mm 2.1 (+/-0.15) mm 15.9 (+/-0.2) mm 23.9 (+/-0.
Figure 37: Pin dimensions of WT32i, top view Figure 38: Recommended PCB land pattern for WT32i Bluegiga Technologies Oy Page 54 of 64
12 Soldering Recommendations WT32i is compatible with industrial standard reflow profile for Pb-free solders. The reflow profile used is dependent on the thermal mass of the entire populated PCB, heat transfer efficiency of the oven and particular type of solder paste used. Consult the datasheet of particular solder paste for profile configurations. Bluegiga Technologies will give following recommendations for soldering the module to ensure reliable solder joint and operation of the module after soldering.
13 Package Figure 40: Carrier tape dimensions Bluegiga Technologies Oy Page 56 of 64
Figure 41: Reel dimensions Bluegiga Technologies Oy Page 57 of 64
14 Certification Guidance for an End Product Using WT32i 14.1 Bluetooth End Product Listing The Bluetooth SIG requires for every commercially available product implementing Bluetooth technology to be listed on the Bluetooth SIG End Product Listing (EPL). For the details on how to make the end product listin, please refer to the Bluetooth End Product Listing Guide available in www.bluegiga.com. 14.
Note: Because all the radiated emissions must be tested with the end product in any case and because the end product manufacturer is fully responsible for the compliance of the end product, any antenna can be selected for WT32i-E, not just the antenna type that Bluegiga has used in the CE approvals. 14.3 FCC Certification of an End Product In FCC there are three different levels of product authorization: VERIFICATION o Required for digital devices.
14.3.1 Co-location with Other Transmitters Co-location means co-transmission, not physical co-location. The radios are not considered to be in colocation when the physical separation is more than 20 cm or if the transmissions overlap less than 30 seconds. When two or more radios are in co-location human exposure must be evaluated as the sum of TX powers from all the radios transmitting simultaneously.
15.3 FCC WT32i complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Any changes or modifications not expressly approved by Bluegiga Technologies could void the user’s authority to operate the equipment.
“Contains Transmitter Module FCC ID: QOQWT32I” or “Contains FCC ID: QOQWT32I” The OEM integrator has to be aware not to provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product 15.4 IC IC Statements: WT32i complies with Industry Canada licence-exempt RSS standard(s).
Selon les réglementations d’Industrie Canada, cet émetteur radio ne doit fonctionner qu’avec une antenne d’une typologie spécifique et d’un gain maximum (ou inférieur) approuvé pour l’émetteur par Industrie Canada. Pour réduire les éventuelles perturbations radioélectriques nuisibles à d’autres utilisateurs, le type d’antenne et son gain doivent être choisis de manière à ce que la puissance isotrope rayonnée équivalente (P.I.R.E.
16 Contact Information Sales: sales@bluegiga.com Technical Support: www.bluegiga.com/support Orders: orders@bluegiga.com WWW: www.bluegiga.com www.bluegiga.hk Head Office / Finland: Phone: +358-9-4355 060 Fax: +358-9-4355 0660 Sinikalliontie 5A 02630 ESPOO FINLAND Postal address / Finland: P.O. BOX 120 02631 ESPOO FINLAND Sales Office / USA: Phone: +1 770 291 2181 Fax: +1 770 291 2183 Bluegiga Technologies, Inc.
