Datasheet

C8051F34x

6 Rev. 0.3

4. Target Board

The C8051F34x Development Kit includes a target board with a C8051F340 device pre-installed for evaluation and

preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping

using the target board. Refer to Figure 4 for the locations of the various I/O connectors.

P1 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)

P2 Analog I/O terminal block

P3 USB connector

P4 RS232 connector

J1 Supply signal header

J2 Port 0 header

J3 Port 1 header

J4 Port 2 header

J5 Port 3 header

J6 Port 4 header

J7 Connects the +3V supply net to the VDD supply net

J8 USB Power or VDD power selection header

J9 Debug connector for debug adapter interface

J10, J11 External crystal enable connectors

J12 Port I/O jumper configuration block

J13 96-pin female connector

J15 Jumper connection for pin 1.5 to capacitors (used when VREF is internally generated)

J16 Jumper connection for potentiometer source to VDD

J17 Jumper connection for potentiometer to pin 2.5

J19 Serial Adapter target board power connector

Figure 4. C8051F340 Target Board

C8051F340-TB

DEBUG

RESET

P2.0

P2.1

J15

J11

J12

J19

340

J16

J17

USB

RS232

PWR

SILICON LABORATORIES

J10

J13

SW3 SW2 SW1

R10