Specifications

AN93
Rev. 0.9 187
Another consideration for EPOS applications is the
method of error detection and error correction. Early
EPOS terminals adopted the use of the Zilog 85C30
Serial Communications Controller in conjunction with a
synchronous modem to implement an HDLC/SDLC-
based data link layer. The complexities of the HDLC
handling is done by the Serial Communications
Controller, while the modem performs strict data pump
function.
However, given the ubiquity of the UART, HDLC
handling can be performed by the modem also. To
facilitate this system partitioning, the V.80 protocol is
used.
V.80 allows the multiplexing of data, control, and status
information so that the host processor can specifically
control what frames are sent to, or received from, the
modem across the asynchronous UART (DTE)
interface. The host performs much of the other layers of
the protocol stack beyond this Data Link Layer. A
discussion of host software is beyond the scope of this
document.
Recommendation V80
The goal of V.80 is the concept of "abstracting hardware
circuits". This is achieved by the addition of a control/
status channel alongside the main data channel.
The main data channel is effectively the information
transfer across the UART TX and RX lines. The control/
status channel that runs alongside the main data
channel is signaled by the use of EM-shielding. This
means a “special character” is chosen to signify the
beginning of the control/status channel. In its simplest
form, this “special character”, in conjunction with the
“next” character, is taken together as a single nugget of
information denoting a special control message or a
special status. This concept is called "EM Shielding".
V.80 uses <0x19> as a special control character. The
next question becomes how to send a character,
<0x19>, as data? This is accommodated by the concept
of "Transparency" in which the host is required to send a
special sequence to signify its desire to send this
<0x19> as data instead of a control character.
The concept could have been very simple, with the
exception of the following complications:
 Desire to support 7 data bit and 1-bit parity
asynchronous protocols
 Desire to support XON and XOFF handshaking
 Desire to limit bandwidth usage
The desire to support 7 data bit, 1 parity bit creates the
possibility that the host would be sending <0x99> when
the intention is to be sending the <0x19> “special
character”. The <EM> character is a shortcut for saying
<0x19> or <0x99>. It would have been nice if the
complication stopped there.
Unfortunately, the XON and XOFF characters are
<0x11> and <0x13>, respectively. These characters are
treated in a special way by many UARTs, and,
therefore, V.80 must ensure that
neither <0x11> or
<0x13> occur in the data stream so that a lower protocol
layer will not need to be rewritten. Hence, the final
"special character set" for V.80 includes:
<0x19> <0x99> <0x11> <0x13>
What happens if the data file being sent is a constant
stream of <0x19> bytes? By the single-transparency
rules, one would then argue that the number of bytes
sent across the DTE would effectively be doubled; so, to
ensure that the throughput is not significantly bloated by
the EM Shielding, provisions for all combinations of two
special character combinations are created. This adds
yet another sixteen EM Shielding cases since there are
4 x 4 matrix of combinations of these special characters.
At this point, the Transparency cases for EM Shielding
can thus guarantee the ability to 'send anything' over
the DTE with the special considerations of 7 vs 8 data
bits, XON and XOFF characters and throughput
considerations. However, once the data channel has
been architected, the rest of the unused EM codes can
be used for the primary purpose of V.80, which is the
concept of "hardware abstraction".
In EPOS applications, abstracting pins, such as RI
or
RTS
, have very little value. The value comes in
abstracting the TXCLK and RXCLK of the Synchronous
UART. The Synchronous UART is the primary method
of connecting to the Zilog 85C30 Serial Channel
Controller. V.80 allows the interface between the host
and the modem to be a simple asynchronous DTE,
while allowing for synchronous operation performed by
the modem itself.
The purpose of going through this explanation is to
allow the easier reading of the V.80 standard and to
provide the proper framing of the use of V.80 in an
EPOS application. It is important to note that the
usage
of V.80 for HDLC function does not use much of the
other aspects of V.80.
For example, the data transferred across the UART is
assumed to be 8-bits, even though V.80 provides the
ability to transfer ASCII data in 7-bits only. Also, it is rare
for XON/XOFF handshaking to be used in an EPOS
application, but, again the transparency rules of EM
Shielding are burdened with these extra EM codes.