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Si4421

17. Status Read Command

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 POR

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0000h

The read command starts with a zero, whereas all other control commands start with a one. If a read command is identified, the

status bits will be clocked out on the SDO pin as follows:

Status Register Read Sequence with FIFO Read Example:

Bit Name Function

RGIT TX register is ready to receive the next byte (Can be cleared by Transmitter Register Write Command, page 24)

FFIT

The number of data bits in the RX FIFO has reached the pre-programmed limit (Can be cleared by any of the

FIFO read methods)

POR Power-on reset (Cleared after Status Read Command)

RGUR TX register under run, register over write (Cleared after Status Read Command)

FFOV RX FIFO overflow (Cleared after Status Read Command)

WKUP Wake-up timer overflow (Cleared after Status Read Command)

EXT Logic level on interrupt pin (pin 16) changed to low (Cleared after Status Read Command)

LBD Low battery detect, the power supply voltage is below the pre-programmed limit

FFEM FIFO is empty

ATS Antenna tuning circuit detected strong enough RF signal

RSSI The strength of the incoming signal is above the pre-programmed limit

DQD Data quality detector output

CRL Clock recovery locked

ATGL Toggling in each AFC cycle

OFFS(6) MSB of the measured frequency offset (sign of the offset value)

OFFS(3) -OFFS(0) Offset value to be added to the value of the frequency control parameter (Four LSB bits)

Note: In order to get accurate values the AFC has to be disabled during th

e read by clearing the en bit in the AFC Control Command

(page 21). The AFC offset value (OFFS bits in the status word) is represent

ed as a two’s complement number. The actual

frequency offset can be calculated as the AFC offset value multiplied by the current PLL frequency step (see the Frequency

Setting Command on page 17).