User guide

AC701 Evaluation Board www.xilinx.com 17
UG952 (v1.1) January 30, 2013
Feature Descriptions
Flash memory on the AC701 board. For more details, see the Numonyx
N25Q256A13ESF40G data sheet
http://www.micron.com.
SPI External Programming Header
In addition to the QSPI device FPGA U1 connections shown in Table 1-5, the FPGA U1 SPI
interface is connected to an external programming header J7.
Table 1-6 shows the SPI J7 connections to FPGA U1.
Figure 1-6 shows the J7 SPI external programming connector.
X-Ref Target - Figure 1-5
Figure 1-5: 256 Mb Quad-SPI Flash memory
UG952_c1_05_101812
VCC3V3
N25Q256
256 Mb Serial
Flash Memory
GND
1
2
3
5
7
6
U7
4
8
VCC3V3
C18
0.1μF 25V
X5R
FLASH_D2
DQ1
16
15
14
12
10
11
13
9
SB
NC3
NC2
NC1
NC0
VCC
HOLD_B/DQ3
WB/VPP/DQ2
VSS
NC4
NC5
NC6
NC7
DQ0
C
R17
DNP
R18
4.7kΩ 5%
R431
15Ω 1%
R432
15Ω 1%
FLASH_D0
FPGA_CCLK
FLASH_D2_R
FLASH_D0_R
GND
VCC3V3
R20
DNP
R19
4.7kΩ 5%
R21
4.7kΩ 5%
R430
15Ω 1%
R429
15Ω 1%
FLASH_D2_R
FLASH_D3_R
FLASH_D3
FLASH_D1
QSPI_IC_CS_B
Table 1-6: SPI J7 Connections to the FPGA
U1 FPGA Pin
Schematic Net
Name
J7 Pin
AE16 FPGA_PROG_B 1
N14 FLASH_D3 2
P14 FLASH_D2 3
J3.2 QSPI_CS_B 4
R14 FLASH_D0 5
R15 FLASH_D1 6
H13 FPGA_CCLK 7
NA GND 8
NA VCC3V3 9