User guide

AC701 Evaluation Board www.xilinx.com 37
UG952 (v1.1) January 30, 2013
Feature Descriptions
The Ethernet connections from the XC7A200T at U1 to the 88E1116R PHY device at U12 are
listed in
Table 1-16 Ethernet PHY Connections to FPGA U1.
Table 1-15: Ethernet PHY U12 Configuration Pin Settings
U12 Pin Name (No.) Setting Configuration
CONFIG0 (64) VCCO1V8 PHYAD[1]=1 PHYAD[0]=1
CONFIG1 (1) PHY_LED0 PHYAD[3]=0 PHYAD[2]=1
CONFIG2 (2) GND ENA_XC=0 PHYAD[4]=0
PHY_LED0 ENA_XC=0 PHYAD[4]=1
VCC1V8 ENA_XC=1 PHYAD[4]=1
CONFIG3 (3) GND RGMII_TX=0 RGMII_RX=0
PHY_LED0 RGMII_TX=0 RGMII_RX=1
PHY_LED1 RGMII_TX=1 RGMII_RX=0
VCC1V8 RGMII_TX=1 RGMII_RX=1
Table 1-16: Ethernet PHY U12 Connections to FPGA U1
FPGA U1 Pin Number Schematic Net Name
M88E1116R U12
Pin Name
T14 PHY_MDIO 45 MDIO
W18 PHY_MDC 48 MDC
U22 PHY_TX_CLK 60 TX_CLK
T15 PHY_TX_CTRL 63 TX_CTRL
T17 PHY_TXD3 62 TXD3
T18 PHY_TXD2 61 TXD2
U15 PHY_TXD1 59 TXD1
U16 PHY_TXD0 58 TXD0
U21 PHY_RX_CLK 53 RX_CLK
U14 PHY_RX_CTRL 49 RX_CTRL
V14 PHY_RXD3 55 RXD3
V16 PHY_RXD2 54 RXD2
V17 PHY_RXD1 51 RXD1
U17 PHY_RXD0 50 RXD0
V18 PHY_RESET_B 10 RESET_B