User guide

AC701 Evaluation Board www.xilinx.com 75
UG952 (v1.1) January 30, 2013
Configuration Options
Configuration Options
The FPGA on the AC701 board can be configured using these methods:
• Master SPI (uses the Quad-SPI Flash U7).
• JTAG (uses the U26 Digilent USB-to-JTAG Bridge or J4 Download Cable connector).
See USB JTAG Module, page 20 for more information.
SeeUG480, 7 Series FPGAs XADC Dual 12-Bit 1MSPS Analog-to-Digital Converter User
Guide for further details on configuration modes.
The method used to configure the FPGA is controlled by the mode pins (M2, M1, M0)
setting selected through DIP switch SW1.
Table 1-36 lists the supported mode switch
settings.
Figure 1-47 shows mode switch SW1.
Table 1-36: Mode Switch SW1 Settings
Configuration
Mode
Mode Pins (M[2:0])
Bus
Width
CCLK
Direction
Master SPI 001 x1, x2, x4 Output
JTAG 101 x1 Not Applicable
X-Ref Target - Figure 1-47
Figure 1-47: Mode Switch
UG952_c1_41_011813
SDA03H1SBD
SW1
FPGA_3V3
FPGA_M2
FPGA_M0
FPGA_M1
R339
1.21K
0.1W
1%
R338
1.21K
0.1 W
1%
R337
1.21K
0.1W
1%
1
2
3
6
5
4
GND
ON
NC