User guide

Appendix C: Master Constraints File Listing
86 www.xilinx.com AC701 Evaluation Board
UG952 (v1.1) January 30, 2013
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D23]
set_property PACKAGE_PIN W23 [get_ports HDMI_R_D19]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D19]
set_property PACKAGE_PIN Y22 [get_ports HDMI_R_D33]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D33]
set_property PACKAGE_PIN Y23 [get_ports HDMI_R_D34]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D34]
set_property PACKAGE_PIN U22 [get_ports PHY_TX_CLK]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_TX_CLK]
set_property PACKAGE_PIN V22 [get_ports HDMI_R_D35]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D35]
set_property PACKAGE_PIN U21 [get_ports PHY_RX_CLK]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_RX_CLK]
set_property PACKAGE_PIN V21 [get_ports HDMI_R_CLK]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_CLK]
set_property PACKAGE_PIN W21 [get_ports HDMI_INT]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_INT]
set_property PACKAGE_PIN Y21 [get_ports HDMI_R_SPDIF]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_SPDIF]
set_property PACKAGE_PIN T20 [get_ports HDMI_SPDIF_OUT_LS]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_SPDIF_OUT_LS]
set_property PACKAGE_PIN U20 [get_ports HDMI_R_D18]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D18]
set_property PACKAGE_PIN W20 [get_ports HDMI_R_D20]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D20]
set_property PACKAGE_PIN Y20 [get_ports HDMI_R_D22]
set_property IOSTANDARD LVCMOS18 [get_ports HDMI_R_D22]
set_property PACKAGE_PIN T19 [get_ports USB_UART_TX]
set_property IOSTANDARD LVCMOS18 [get_ports USB_UART_TX]
set_property PACKAGE_PIN U19 [get_ports USB_UART_RX]
set_property IOSTANDARD LVCMOS18 [get_ports USB_UART_RX]
set_property PACKAGE_PIN V19 [get_ports USB_UART_RTS]
set_property IOSTANDARD LVCMOS18 [get_ports USB_UART_RTS]
set_property PACKAGE_PIN W19 [get_ports USB_UART_CTS]
set_property IOSTANDARD LVCMOS18 [get_ports USB_UART_CTS]
set_property PACKAGE_PIN V18 [get_ports PHY_RESET_B]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_RESET_B]
set_property PACKAGE_PIN W18 [get_ports PHY_MDC]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_MDC]
set_property PACKAGE_PIN T14 [get_ports PHY_MDIO]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_MDIO]
set_property PACKAGE_PIN T15 [get_ports PHY_TX_CTRL]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_TX_CTRL]
set_property PACKAGE_PIN T17 [get_ports PHY_TXD3]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_TXD3]
set_property PACKAGE_PIN T18 [get_ports PHY_TXD2]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_TXD2]
set_property PACKAGE_PIN U15 [get_ports PHY_TXD1]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_TXD1]
set_property PACKAGE_PIN U16 [get_ports PHY_TXD0]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_TXD0]
set_property PACKAGE_PIN U14 [get_ports PHY_RX_CTRL]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_RX_CTRL]
set_property PACKAGE_PIN V14 [get_ports PHY_RXD3]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_RXD3]
set_property PACKAGE_PIN V16 [get_ports PHY_RXD2]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_RXD2]
set_property PACKAGE_PIN V17 [get_ports PHY_RXD1]
set_property IOSTANDARD LVCMOS18 [get_ports PHY_RXD1]