User guide

12 www.xilinx.com FMC XM104 Connectivity Card User Guide
UG536 (v1.1) September 24, 2010
Chapter 1: XM104
Table 1-2: XM104 Features
Number Feature Notes
Schematic
Page
1
VITA 57.1 FMC HPC
connector
J1: Ten sets of FPGA multi-gigabit transceiver data port signals, a
small number of FPGA single ended control signals from the board,
clocks and power. The connector is mounted on the bottom side of the
card.
2-5
2
MGT Data Port 0:
Four SMA
connectors
FPGA multi-gigabit transceiver data port 0 on SMA connectors J3, J4,
J5, J6.
6
3
MGT Data Port 1:
Four SMA
connectors
FPGA multi-gigabit transceiver data port 1 on SMA connectors J7, J8,
J9, J10.
6
4
MGT Data Port 2:
Serial ATA Port 1
FPGA multi-gigabit transceiver data port 2 on Serial ATA host
connector J11. The connector is mounted on the bottom side of the
XM104. This connector is mounted on the bottom side of the card.
6
5
MGT Data Port 3:
Serial ATA Port 2
FPGA multi-gigabit transceiver data port 3 on Serial ATA host
connector J12. The connector is mounted on the bottom side of the
XM104.
6
6
MGT Quad Data
Port: 10GE Base-CX4
receptacle
FPGA multi-gigabit transceiver data ports 4 through 7 on 10GE Base-
CX4 receptacle J2. The connector is mounted on the bottom side of the
card.
6
7 2K bit EEPROM
IIC compatible electrically erasable programmable memory
(EEPROM) with 2 Kb (256 bytes) of non-volatile storage.
7
8 PCA9543 IIC Switch IIC bus switch to isolate the fixed address SI570 and Si5368 devices. 7
9 Clocking circuits
Silicon Labs Si570 IIC serial bus re-programmable clock source and
Silicon Labs Si5368 any-rate precision clock multiplier and clock jitter
attenuator clock source integrated circuits.
7-8
Notes:
1. VITA 57.1 FMC HPC Connector J1.