Specifications

C8051F330/1
158 Rev. 1.1
Master
Device 2
Master
Device 1
MOSI
MISO
SCK
MISO
MOSI
SCK
NSS
GPIO
NSS
GPIO
Figure 17.2. Multiple-Master Mode Connection Diagram
Figure 17.3. 3-Wire Single Master and 3-Wire Single Slave Mode Connection Diagram
Slave
Device
Master
Device
MOSI
MISO
SCK
MISO
MOSI
SCK
Slave
Device
Master
Device
MOSI
MISO
SCK
MISO
MOSI
SCK
NSS NSS
GPIO
Slave
Device
MOSI
MISO
SCK
NSS
Figure 17.4. 4-Wire Single Master Mode and 4-Wire Slave Mode Connection Diagram