Data Sheet

4.7.2 Digital I/O Terminal Specifications
Table 4.7. Digital I/O Terminal Specifications
Parameter Symbol Test Condition Min Typ Max Unit
Voltage input low (relative to
V
VDD_IO
)
V
IL
— — 30 %
Voltage input high (relative to
V
VDD_IO
)
V
IH
70 — — %
Logic low output voltage (rel-
ative to V
VDD_IO
)
V
OL
Sinking 5 mA, V
VDD_IO
≥ 1.62 V — — 25 %
Logic high output voltage
(relative to V
VDD_IO
)
V
OH
Sourcing 5 mA, V
VDD_IO
≥ 1.62 V 80 — — %
Input leakage current I
Leak
— 1 — nA
Pullup resistance R
PU
30 43 65 kΩ
Pulldown resistance
1
R
PD
30 43 65 kΩ
Output fall time from V
OH
to
V
OL
T
OF
50 pF load, V
VDD_IO
= 1.62 V — 15 — ns
Output rise time from V
OL
to
V
OH
T
OR
50 pF load, V
VDD_IO
= 1.62 V — 15 — ns
Note:
1. RESETn pin has only pull-up resistance.
4.8 Host Interface
The host interface allows control of WFM200S by an MCU or SoC using either SPI or SDIO. Selection between SPI and SDIO is done
upon the logic state on SDIO_DAT2/HIF_SEL pin during the rising edge of RESETn signal. If this signal is HIGH, the host interface is
configured as SDIO, otherwise it is configured as SPI. The tables below summarizes the pin configurations for the two modes and the
achievable speeds on both interfaces
Table 4.8. WFM200S SPI and SDIO interface pin configuration
WFM200S Pin Name SPI Mode SDIO Mode
RESETn 0 -> 1 1 0 -> 1 1
SDIO_DAT2/HIF_SEL 0 x 1 SDIO_DAT2
SDIO_CLK/SPI_CLK x SPI_CLK x SDIO_CLK
SDIO_CMD/SPI_MOSI x SPI_MOSI x SDIO_CMD
SDIO_DAT0/SPI_MISO x SPI_MISO x SDIO_DAT0
SDIO_DAT1/SPI_WIRQ x WIRQ
(interrupt request to
the SPI host)
x SDIO_DAT1
SDIO_DAT3/SPI_CSn x SPI_CSn x SDIO_DAT3
WFM200S Data Sheet
Electrical Specifications
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