Data Sheet

Alternate LOCATION
Functionality 0 - 3 4 - 7 Description
US1_CS 2: PF1 USART1 chip select input / output.
US1_CTS 5: PB13 USART1 Clear To Send hardware flow control input.
US1_RTS 5: PB14 USART1 Request To Send hardware flow control output.
US1_RX
2: PD6 5: PA0
6: PA2
USART1 Asynchronous Receive.
USART1 Synchronous mode Master Input / Slave Output (MISO).
US1_TX
5: PF2 USART1 Asynchronous Transmit. Also used as receive input in half duplex communica-
tion.
USART1 Synchronous mode Master Output / Slave Input (MOSI).
US2_CLK
0: PC4
1: PB5
3: PA15
5: PF2
USART2 clock input / output.
US2_CS
0: PC5
1: PB6
3: PB11
5: PF5
USART2 chip select input / output.
US2_CTS 1: PB12 5: PD6 USART2 Clear To Send hardware flow control input.
US2_RTS 5: PD8 USART2 Request To Send hardware flow control output.
US2_RX
1: PB4 5: PF1 USART2 Asynchronous Receive.
USART2 Synchronous mode Master Input / Slave Output (MISO).
US2_TX
1: PB3 5: PF0 USART2 Asynchronous Transmit. Also used as receive input in half duplex communica-
tion.
USART2 Synchronous mode Master Output / Slave Input (MOSI).
US3_CLK 0: PA2 USART3 clock input / output.
US3_CS 0: PA3 USART3 chip select input / output.
US3_CTS
0: PA4
1: PE5
2: PD6
USART3 Clear To Send hardware flow control input.
US3_RTS 0: PA5 USART3 Request To Send hardware flow control output.
US3_RX
0: PA1
1: PE7
USART3 Asynchronous Receive.
USART3 Synchronous mode Master Input / Slave Output (MISO).
US3_TX
0: PA0
1: PE6
2: PB3
USART3 Asynchronous Transmit. Also used as receive input in half duplex communica-
tion.
USART3 Synchronous mode Master Output / Slave Input (MOSI).
USB_DM 0: PF10 USB D- pin.
USB_DP 0: PF11 USB D+ pin.
USB_VBUSEN 0: PF5 USB 5 V VBUS enable.
VDAC0_EXT 0: PD6 Digital to analog converter VDAC0 external reference input pin.
WGM160P Wi-Fi
®
Module Data Sheet
Pin Descriptions
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