Datasheet

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DDR2 Unbuffered SODIMM

Spec Sheet

1 Rev 1.0 Nov. 2010

Features

•200-pin, Small-Outline Dual In-line Memory Module (SODIMM)

• Fast data transfer rates: PC2-4200, PC2-5300, or PC2-6400

• 512MB (64Mx64), 1GB (128 Meg x 64), 2GB (256 Meg x 64)

• JEDEC standard 1.8V I/O (SSTL_18-compatible)

• VDD = 1.8 V ±0.1V (SSTL_18)

• VDDSPD = +1.7V to +3.6V

• Differential clock inputs, Differential data strobe (DQS, DQS#) option

• 4n-bit prefetch architecture

• Multiple internal device banks for concurrent operation

• Programmable CAS latency (CL)

• Posted CAS additive latency (AL)

• WRITE latency = READ latency - 1 tCK

• Programmable burst lengths (BL): 4 or 8

• Adjustable data-output drive strength

• 64ms, 8,192-cycle refresh

• On-die termination (ODT)

• Serial presence-detect (SPD) with EEPROM

• Gold edge contacts

Summary of content (7 pages)

PAGE 1
DDR2 Unbuffered SODIMM Spec Sheet Features •200-pin, Small-Outline Dual In-line Memory Module (SODIMM) • Fast data transfer rates: PC2-4200, PC2-5300, or PC2-6400 • 512MB (64Mx64), 1GB (128 Meg x 64), 2GB (256 Meg x 64) • JEDEC standard 1.8V I/O (SSTL_18-compatible) • VDD = 1.8 V ±0.1V (SSTL_18) • VDDSPD = +1.7V to +3.
PAGE 2
DDR2 Unbuffered SODIMM Spec Sheet Module Specification Part Number SP512MBSRU533O01(2) SP512MBSRU667O01(2) SP001GBSRU533Q01(2) SP001GBSRU667Q01(2) SP001GBSRU800Q02 SP001GBSRU667O01(2) SP001GBSRU800O01 SP001GBSRU533S01(2) SP001GBSRU667S01(2) SP001GBSRU800S01(2) SP002GBSRU533S01(2) SP002GBSRU667S01(2) SP002GBSRU800S01(2) Module Density & Configuration 512MB (64Mx64) 64Mx8 1Rank 1GB (128Mx64) 64Mx16 2Ranks 1GB (128Mx64) 64Mx8 2Ranks 1GB (256Mx64) 128Mx8 1Rank 2GB (256Mx64) 128Mx8 2Ranks Bandwidth Data Rate
PAGE 3
DDR2 Unbuffered SODIMM Spec Sheet Pin Assignments 200-Pin DDR2 SODIMM Front 200-Pin DDR2 SODIMM Back Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol 1 51 DQ1 57 9 VSS 59 11 DQS0# 61 13 DQS0 63 15 VSS 65 17 DQ2 67 117 19 DQ3 VSS DQ8 DQ9 VSS DQS1# DQS1 VSS DQ10 DQ11 VSS VSS DQ16 DQ17 VSS DQS2# 69 83 85 BA2 135 87 VDD A12 A9 A8 VDD A5 A3 137 A0 VDD BA1 RAS# S0# VDD ODT0 A13 VDD NC VSS DQ36 DQ37 VSS DM4 VSS DQ38 DQ39 VSS DQ4
PAGE 4
DDR2 Unbuffered SODIMM Spec Sheet Pin Description Symbol Type A0–A13 Input (SSTL_18) BA0–BA2 Input (SSTL_18) CK0, CK0#, CK1, CK1#, CK2, CK2# Input (SSTL_18) CKE0 ,CKE1 Input (SSTL_18) ODT0, ODT1 Input (SSTL_18) RAS#, CAS#, WE# Input (SSTL_18) Input (SSTL_18) Input (SSTL_18) Input (SSTL_18) S0#, S1# SA0–SA2 SCL SDA I/O DM0–DM7 I/O (SSTL_18) DQ0–DQ63 I/O (SSTL_18) DQS0–DQS7, DQS0#–DQS7# I/O (SSTL_18) Description Address inputs: Provide the row address for ACTIVE commands, and the column
PAGE 5
DDR2 Unbuffered SODIMM Spec Sheet Module Dimensions (x8 1Rank) Note 1: All dimensions are typical unless otherwise stated. (Millimeters) Note 2: The dimensional diagram is for reference only 5 Rev 1.0 Nov.
PAGE 6
DDR2 Unbuffered SODIMM Spec Sheet Module Dimensions (x8 2Ranks) X64 DIMM, populated as one physical rank of x8 DDR2 SDRAMs Note 1: All dimensions are typical unless otherwise stated. (Millimeters) Note 2: The dimensional diagram is for reference only 6 Rev 1.0 Nov.
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DDR2 Unbuffered SODIMM Spec Sheet Module Dimensions (x16 2Ranks) 7 Rev 1.0 Nov.