Users Manual Part 1

SIM8260A_Hardware Design_V1.05
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BT I2S interface
BT_ I2S_DOUT
K3
DO
P3
I2S data output
Default use for W82
BT_ I2S_DIN
M3
DI
P3
I2S data input
BT_I2S_CLK
J1
DO
P3
I2S bit clock
BT_ I2S_WS
G1
DO
P3
I2S word select
I2S Audio Codec interface
I2S_DOUT/
PCM_DOUT
N1
DO
P3
I2S/PCM data output
Default is I2S interface,
can be configured as
PCM interface by
software.
If unused, please keep
open
I2S_DIN/
PCM_DIN
R1
DI
P3
I2S/PCM data input
I2S_CLK/
PCM_CLK
P3
DO
P3
I2S/PCM clock output
I2S_WS/
PCM_SYNC
T3
DIO
P3
I2S word select/
PCM synchronous signal
I2S_MCLK
L1
DO
P3
I2S master clock output
CDC_RST_N
AK7
DO
P3
Module reset the external
codec active low
Soft Default not
supported
ADC interface
ADC0
AH7
AI
Analog to digital converter
input0
For EBI
LCD_backlight_contrl
ADC1
AF7
AI
Analog to digital converter
input1
PCIe interface
PCIe_REFCLK_P
B22
AIO
PCIe reference clock plus
Required 85Ω
differential impedance
PCIe_REFCLK_M
A21
AIO
PCIe reference clock minus
PCIe_TX0_M
B18
AO
PCIe transmit0 minus
PCIe_TX0_P
A17
AO
PCIe transmit0 plus
PCIe_TX1_M
B20
AO
PCIe transmit1 minus
PCIe_TX1_P
A19
AO
PCIe transmit1 plus
PCIe_RX0_M
A25
AI
PCIe receive0 minus
PCIe_RX0_P
B26
AI
PCIe receive0 plus
PCIe_RX1_M
A23
AI
PCIe receive1 minus
PCIe_RX1_P
B24
AI
PCIe receive1 plus
PCIe_CLKREQ
C21
DIO
P3
PCIe clock request input low
CLKREQ and WAKE
need pull up to
VDD_EXT externally;
When there is an
external level conversion
chip, CLKREQ,WAKE,
RST all need to be pulled
up
Default as RC mode
PCIe_WAKE
C25
DI
P3
PCIe wake-up input low
PCIe_RST
C23
DO
P3
PCIe reset output low