Users Manual Part 1

SIM8260A_Hardware Design_V1.05
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USB_SS_SW
C13
DO
P3
USB Type-C switch control
signal
Table 21: Recommended CC detector list
Name
Manufacturer
Model
CC Detector
PERICOM
PI5USB30216D
Table 22: Recommended SS USB switch list
Name
Manufacturer
Model
USB Switch
PERICOM
PI3DBS12212A
Table 23: Recommended OTG 5V DC-DC and USB interface TVS list
Name
Manufacturer
Model
OTG
AWINIC
AW3605DNR
TVS
WILL
ESD5302N-3/TR
Please refer to the reference design for the design circuit diagram of OTG.
HS USB DP/DM layout guidelines:

Require differential trace impedance is 85±10% Ω.
 The intra-lane length mismatch of the differential signal lanes is less than 1mm.
 Gap from other signals keeps 3xline width.
 External TVS or EMI components should be placed near the USB connector.
 Trace routes away from other sensitive signals (RF, audio, and XO).
 Maximum PCB trace length cannot exceed 100mm outside of module, the shorter trace and better.
SS USB TX/RX layout guidelines:
 Require differential trace impedance is 85±10% Ω.
 The intra-lane length mismatch of the differential signal lanes is less than 500um.
 Gap from other signals keeps 4xline width.

Gap between Rx-to-Tx keeps 4xline width.
 External TVS or EMI components should be placed near the USB connector.
 Trace routes away from other sensitive signals (RF, especially 2.4 GHz).
 Route differential pairs in the inner layers with a solid GND reference to have good impedance control
and to minimize discontinuities.
 Keep isolation between the Tx pair, Rx pair, and DP/DM to avoid crosstalk.
 If core vias are used, use no more than two core vias per signal line to limit stubs.