Users Manual Part 2

SIM8260A_Hardware Design_V1.05
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Figure 30: I2S timing
Table 35: I2S timing parameters
3.9.2 I2S Reference Circuit
The following figure shows the external codec reference design.
Signal
Parameter
Description
Min.
Typ.
Max.
Unit
I2S_MCLK
Frequency
Frequency
–
12.288
12.288
MHz
T
Clock period
81.380
81.380
–
ns
t(HC)
Clock high
0.45T
–
0.55T
ns
t(LC)
Clock low
0.45T
–
0.55T
ns
I2S_CLK
Frequency
Frequency
8
48
48
KHz
T
Clock period
20.83
20.83
125
us
t(HC)
Clock high
0.45T
–
0.55T
ns
t(LC)
Clock low
0.45T
–
0.55T
ns
I2S_WS
t(sr)
DIN/DOUT and WS input setup
time
16.276
–
–
ns
t(hr)
DIN/DOUT and WS input hold
time
0
–
–
ns
t(dtr)
DIN/DOUT and WS output delay
–
–
65.10
ns
t(htr)
DIN/DOUT and WS output hold
time
0
–
–
ns