User Manual

SGD-SB2025NT-TUM, Part 2
Jan 12 Page 23
NI ET
Moving the mouse pointer over the ‘In’ indicator will show information about packet errors see
Section 2.4.1.4
below.
A network failure may be assigned to ‘Alarmstatus see
Section 12 Alarms
. There will be a
delay of several seconds between the moment of network failure and the failed indication
appearing, in order to prevent short drop-outs from raising the alarm.
2.4.1.2 PAT
The Packet Arrival Time (‘PAT’) is the time, in milliseconds, taken for packet zero to arrive at the
NI. The value is rounded up to the nearest millisecond and is used as an indication of network
transit time. It is updated every second and is also presented on the ‘Sync Timing’ screen of the
TM ET (see
Section 5.3.1 – Sync Timing
).
This value should largely remain static unless a network re-route is experienced. A figure that is
not stable may indicate a network problem as long as the NI is receiving a valid timing signal. If
the ‘PLL’ is indicating a frequency error, the PAT report cannot be trusted.
2.4.1.3 TOT
This is the setting of the Total Output Time (TOT) as configured in the TM. See
Section 7 – Solar
(Sync) Timing
for detailed information.
2.4.1.4 Pkt Errors
This is an incrementing count updated in real time that shows the number of packets that arrive too
late for processing at the NI (this includes any that do not arrive at all). The value shown is that
which has occurred since the ET was first connected and this may be set to zero by clicking on the
count value.
A total count of packet errors is maintained in the NI itself and this value, together with the ET
value of packet errors, will be displayed in a “hints window” for a short time if the mouse pointer is
positioned over the Network ‘In’ indicator. The NI total count value will be reset by a power off/on
cycle of the NI.
In both cases, the values will roll back to zero after reaching 65,535. A count that is gradually
incrementing indicates that the packets are either being lost or, more likely, arriving close to the
limit of the buffer/time settings, with some simply falling past the boundary.
2.4.2 PLL
2.4.2.1 Status and Freq Error/Phase Error
The ‘PLL’ is the report on the accuracy of the internal clock, which is locked to the 1PPS timing
signal in order to synchronise the audio. At power-up, this indication will be
Red
and the ‘Freq
Error’ and ‘Phase Error’ counts will be zero. Once the PPS timing signal is present, a ‘Freq Error
will be shown and this will be brought down to zero over a period of several seconds. This will be
followed by a ‘Phase Error’ count being shown, which again will gradually be brought down
towards zero, although this action could take a minute or even longer to achieve. Once the ‘Freq
Error’ count is less than 4 and the ‘Phase Error’ count is less than 30, the ‘Status’ indication will
turn
Green
.
A large PLL error will be manifest as a wideband phase error on the audio output, however, being
a very fine indication, the resultant effect on the audio is such that a ‘Phase Error’ value as high as
50 is most unlikely to be evident in a signal overlap area. A PLL phase error has no discernable
effect for a NI operating in Central mode.