User's Manual

XFIN-BLADE-SM
TECHNICAL DESCRIPTION PAGE 27
Test
Point
Monitors Signal Type
1 Active-Low INVALID Pin on RS232 chip (U1) 3.3V Digital
2 Active-Low INVALID Pin on RS232 chip (U2) 3.3V Digital
3 Transmit Centre-Tap on Magnetic RJ45 (P3) D.C.
4 Output 4 of Clock Driver (U12) Bank B Clock Signal
5 Inverted Output of Digital I/O Shift Register (U10) 3.3V Digital
6 Inverted Output of Digital I/O Shift Register (U17) 3.3V Digital
7 Inverted Output of Digital I/O Shift Register (U11) 3.3V Digital
8 Output 4 of Clock Driver (U12) Bank B Clock Signal
9 DSP PF10 3.3V Digital
10 IXP_IRQA output from CPLD (U22) 3.3V Digital
11 IXP_CLK_CPLD Signal to CPLD (U22) Clock Signal
12 IXP_IRQB output from CPLD (U22) 3.3V Digital
13 GPIO_IN4 Signal to CPLD (U22) 3.3V Digital
14 Feedback to Clock Driver (U12) Clock Signal
15 SPI_MISO signal to IXP GPIO(2) 3.3V Digital
16 TX_DATA signal for High Speed Serial Port 1 on the IXP
(U34)
3.3V Digital
17 RX_CLK signal for High Speed Serial Port 0 on the IXP (U34) 3.3V Digital
18 SPI_CS_ADC signal from IXP GPIO(9) 3.3V Digital
19 GPIO_IN7 Signal to CPLD (U22) 3.3V Digital
20 IXP_RD_N Signal to CPLD (U22) 3.3V Digital
21 I
2
C CLK (SCL) 3.3V Digital
22 SPI_CS_DS from IXP GPIO(3) 3.3V Digital
23 RX_DATA signal for High Speed Serial Port 1 on the IXP
(U34)
3.3V Digital
24 RTS for DSP Serial Port from DSP PF3 3.3V Digital
25 Off-Hook signal OH_N from DSP PF8 3.3V Digital
26 SPI_CS_DM 3.3V Digital
27 Spare I/O Pin CIO2 on CPLD (U22) 3.3V Digital
28 JTAG TDO Signal from CPLD (U22) 3.3V Digital
29 TX_FRAME signal for High Speed Serial Port 1 on the IXP
(U34)
3.3V Digital
30 TX_CLK signal for High Speed Serial Port 0 on the IXP (U34) 3.3V Digital
31 RX_CLK signal for High Speed Serial Port 1 on the IXP (U34) 3.3V Digital