User`s guide

AN0821

Rev. 0.1 7

3. Confirm that the MCU system clock is configured as SYSCLK / 8 or 3.0625 MHz:

a. Select the Peripherals tab, if it’s not already selected.

b. Select the Clock Control box from the Clocking group to display the properties in the Properties

view.

c. Verify that the Clock Source Divider property is set to SYSCLK / 8 and SYSCLK is set to 3062500.