Datasheet

Vybrid Power Consumption and Options, Rev. 0
14 Freescale Semiconductor
Powering options
Such power efficiency is due to the voltage drop on the transistor:
as compared to 2.1V in the previous power option. Note than the efficiency of 3.3V DC/DC converter and
of 1.5V DC/DC converter is not taken into account.
This solution is suitable when:
• applications with medium currents used;
• SDRAM is used;
• the thermal power loss on ballast transistor and the size of the transistor package is an issue.
This solution is recommended especially for Linux applications.
8.5 External DC/DC converter
This power option increases the power efficiency to maximum level. The final efficiency depends only on
the switched mode power supply (DC/DC) efficiency.
This option uses a 1.2V switched mode power supply. The problem is that it is not possible to directly
connect the external 1.2V power supply to Vybrid VDD12 input. The reason is that when Vybrid SoC goes
into low power stop mode, it disables LDO with external ballast transistor (HPREG) and it starts using
internal LDOs. (See Figure 3.) Its output is connected to the VDD12 pin. It is not possible to feed VDD12
from an external power supply in this mode.
The solution is to start the application with external ballast transistor and before high current consumption
switch to the external 1.2V switched mode power supply. It has to be done from the user application by
the additional control pin. Any GPIO pin can be used for this purpose.