Datasheet
Vybrid Power Consumption and Options, Rev. 0
Freescale Semiconductor 15
Powering options
Figure 6. External DC/DC converter
The block scheme of the power supply solution using external DC/DC converter power from 5V voltage
level is captured in Figure 6. This solution is convenient for DDR3 usage. When no DDR3 is used, it is
sufficient to power the ballast transistor from the 3V3 rail until the core is powered from 1.2V DC/DC
converter.
This solution requires special additional steps when powering up and when powering down into low power
stop modes. Correct timing and higher filtering capacities are needed.
Power up sequence:
1. Reset.
2. Core is powered from Internal LDO.
3. Start LDO with external ballast transistor.
4. Switch to power from DC/DC converter using GPIO pin (the Enable pin in Figure 6).
a) Enable DC/DC.
b) Open left FET transistor and start supplying from 1.2V DC/DC converter.
c) Close right FET transistor to stop feeding from external ballast transistor.
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