Datasheet

Vybrid Power Consumption and Options, Rev. 0
16 Freescale Semiconductor
Powering options
5. Run the extensive part of the code, which requires more current.
Low power stop mode sequence:
1. Stop extensive part of the code.
2. Switch to power from external ballast transistor using GPIO pin.
a) Open right FET transistor to start feeding from external ballast transistor.
b) Close left FET transistor to stop supplying from 1.2 DC/DC converter.
c) Disable DC/DC.
3. LDO with external ballast transistor is used.
4. Jump in to low power stop mode.
5. Core is powered from internal LDO.
8.6 Power source timing requirements
HPREG with external ballast transistor is enabled during the reset sequence. Normally 3.3V is used and
this voltage is tested during the start by internal logic.
Figure 7. Vybrid Reset/Boot sequence waveform
Yello w RESET_B; Pink EXTAL; Blue 1V2; Green BCTRL