pca9306 datasheet
Table Of Contents
- 1 Features
- 2 Applications
- 3 Description
- Table of Contents
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics
- 6.6 Switching Characteristics AC Performance (Translating Down) (EN = 3.3 V)
- 6.7 Switching Characteristics AC Performance (Translating Down) (EN = 2.5 V)
- 6.8 Switching Characteristics AC Performance (Translating Up) (EN = 3.3 V)
- 6.9 Switching Characteristics AC Performance (Translating Up) (EN = 2.5 V)
- 6.10 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Detailed Description
- 8.1 Overview
- 8.1.1 Definition of threshold voltage
- 8.1.2 Correct Device Set Up
- 8.1.3 Disconnecting a Slave from the Main I2C Bus Using the EN Pin
- 8.1.4 Supporting Remote Board Insertion to Backplane with PCA9306
- 8.1.5 Switch Configuration
- 8.1.6 Master on Side 1 or Side 2 of Device
- 8.1.7 LDO and PCA9306 Concerns
- 8.1.8 Current Limiting Resistance on VREF2
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4 Device Functional Modes
- 8.1 Overview
- 9 Application and Implementation
- 10 Power Supply Recommendations
- 11 Layout
- 12 Device and Documentation Support
- 13 Mechanical, Packaging, and Orderable Information
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
PCA9306
SCPS113M –OCTOBER 2004–REVISED APRIL 2019
PCA9306 Dual Bidirectional I
2
C Bus and SMBus Voltage-Level Translator
1
1 Features
1
• 2-Bit bidirectional translator for SDA and SCL
lines in mixed-mode I
2
C Applications
• I
2
C and SMBus Compatible
• Less than 1.5-ns Maximum Propagation Delay to
Accommodate Standard-mode and Fast-mode I
2
C
Devices and Multiple Masters
• Allows Voltage-level Translation Between
– 1.2-V V
REF1
and 1.8-V, 2.5-V, 3.3-V,
or 5-V V
REF2
– 1.8-V V
REF1
and 2.5-V, 3.3-V, or 5-V V
REF2
– 2.5-V V
REF1
and 3.3-V or 5-V V
REF2
– 3.3-V V
REF1
and 5-V V
REF2
• Provides Bidirectional Voltage Translation with no
Direction Pin
• Low 3.5-Ω ON-state Resistance Between Input
and Output Ports Provides Less Signal Distortion
• Open-drain I
2
C I/O ports (SCL1, SDA1, SCL2, and
SDA2)
• 5-V Tolerant I
2
C I/O Ports to Support Mixed-mode
Signal Operation
• High-impedance SCL1, SDA1, SCL2, and SDA2
pins for EN = Low
• Lockup-free Operation for Isolation when
EN = Low
• Flow-through Pinout for Ease of Printed-circuit-
board Trace Routing
• Latch-up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
2 Applications
• I
2
C, SMBus, PMBus, MDIO, UART, low-speed
SDIO, GPIO, and other two-signal interfaces
• Servers
• Routers (Telecom Switching Equipment)
• Personal Computers
• Industrial Automation
3 Description
The PCA9306 device is a dual bidirectional I
2
C and
SMBus voltage-level translator with an enable (EN)
input, and is operational from 1.2-V to 3.3-V V
REF1
and 1.8-V to 5.5-V V
REF2
.
The PCA9306 device allows bidirectional voltage
translations between 1.2 V and 5 V, without the use
of a direction pin. The low ON-state resistance (R
ON
)
of the switch allows connections to be made with
minimal propagation delay. When EN is high, the
translator switch is ON, and the SCL1 and SDA1 I/O
are connected to the SCL2 and SDA2 I/O,
respectively, allowing bidirectional data flow between
ports. When EN is low, the translator switch is off,
and a high-impedance state exists between ports.
In addition to voltage translation, the PCA9306 device
can be used to isolate a 400-kHz bus from a 100-kHz
bus by controlling the EN pin to disconnect the slower
bus during fast-mode communication.
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
PCA9306
SSOP (8) 2.95 mm x 2.80 mm
VSSOP (8) 2.30 mm x 2.00 mm
X2SON (8) 1.40 mm x 1.00 mm
DSBGA (8) 1.98 mm x 0.98 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Application Diagram










