- Standard Microsystems Single-Chip Ethernet Controller Specification Sheet

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Revision 1.22 (09-25-08) 144 SMSC LAN9420/LAN9420i
DATASHEET
4.5.9 Special Modes
Index (In Decimal): 18 Size: 16 bits
BITS DESCRIPTION TYPE DEFAULT
15:8 RESERVED RO -
7-5 MODE
PHY Mode of operation. Refer to Table 4.8 for more details.
R/W
NASR
111b
4-0 PHYADD
PHY Address. The PHY Address is used for the SMI address.
R/W
NASR
00001b
Table 4.8 MODE Control
MODE MODE DEFINITIONS
DEFAULT REGISTER BIT VALUES
REGISTER 0 REGISTER 4
[13,12,8] [8,7,6,5]
000b 10BASE-T Half Duplex. Auto-negotiation disabled. 000 N/A
001b 10BASE-T Full Duplex. Auto-negotiation disabled. 001 N/A
010b 100BASE-TX Half Duplex. Auto-negotiation
disabled. CRS is active during Transmit & Receive.
100 N/A
011b 100BASE-TX Full Duplex. Auto-negotiation
disabled. CRS is active during Receive.
101 N/A
100b 100ase-TX Half Duplex is advertised. Auto-
negotiation enabled. CRS is active during Transmit
& Receive.
110 0100
101b Repeater mode. Auto-negotiation enabled.
100BASE-TX Half Duplex is advertised. CRS is
active during Receive.
110 0100
110b RESERVED - Do not set LAN9420/LAN9420i in this
mode.
N/A N/A
111b All capable. Auto-negotiation enabled. X1X 1111