Schematic

4
5
6
7
2
1
10
9
3 8
VDD
GND
U1
ADS1015
A0+
AIN0
A0-
AIN1
A1+
AIN2
A1-
AIN3
ALERT/
RDY
ADDR
SCL
SDA
3
2
1
10
9
8
5
6
7 12
13
14
411
Released under the Creative Commons
Attribution Share-Alike 4.0 License
https://creativecommons.org/licenses/by-sa/4.0/
Design by:
MUX PGA
12-bit ΔΣ
ADC
Voltage
Reference
I2C
Interface
Oscillator
Comparator

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