Data Sheet

ICM-20948
Document Number: DS-000189 Page 41 of 89
Revision: 1.3
8.13 INT_STATUS_1
Name: INT_STATUS_1
Address: 26 (1Ah)
Type: USR0
Bank: 0
Serial IF: R/C
Reset Value: 0x00
BIT
NAME
FUNCTION
7:1
-
Reserved.
0
RAW_DATA_0_RDY_INT
1 – Sensor Register Raw Data, from all sensors, is updated and ready to be read.
8.14 INT_STATUS_2
Name: INT_STATUS_2
Address: 27 (1Bh)
Type: USR0
Bank: 0
Serial IF: R/C
Reset Value: 0x00
BIT
NAME
FUNCTION
7:5
-
Reserved.
4:0
FIFO_OVERFLOW_INT[4:0]
1 – FIFO Overflow interrupt occurred.
8.15 INT_STATUS_3
Name: INT_STATUS_3
Address: 28 (1Ch)
Type: USR0
Bank: 0
Serial IF: R/C
Reset Value: 0x00
BIT
NAME
FUNCTION
7:5
-
Reserved.
4:0
FIFO_WM_INT[4:0]
1 – Watermark interrupt for FIFO occurred.
8.16 DELAY_TIMEH
Name: DELAY_TIMEH
Address: 40 (28h)
Type: USR0
Bank: 0
Serial IF: R
Reset Value: 0x00
BIT
NAME
FUNCTION
7:0
DELAY_TIMEH[7:0]
High-byte of delay time between FSYNC event and the 1st gyro ODR event (after the
FSYNC event).
Reading DELAY_TIMEH will lock DELAY_TIMEH and DELAY_TIMEL from the next
update. Reading DELAY_TIMEL will unlock DELAY_TIMEH and DELAY_TIMEL to take
the next update due to an FSYNC event.