Datasheet
The L4974A is a 3.5A monolithic stepdown swit-
chingregulatorworking incontinuousmoderealized
inthenew BCD Technology.This technologyallows
theintegrationofisolatedverticalDMOS powertran-
sistors plus mixed CMOS/Bipolar transistors.
Thedevicecandeliver 3.5Aat an outputvoltagead-
justable from 5.1V to 40V and contains diagnostic
and control functionsthat make it particularly suita-
ble for microprocessor basedsystems.
BLOCK DIAGRAM
The block diagram shows theDMOS power tran-
sistors and the PWM control loop. Integratedfun-
ctions include a referencevoltage trimmed to 5.1V
± 2%,soft start,undervoltagelockout,oscillator with
feedforward control, pulse by pulse current limit,
thermal shutdown and finally the reset and power
fail circuit. The reset and power fail circuit provides
an output signal for a microprocessor indicatingthe
status of the system.
Device turn on is around 11V with a typical 1V hy-
sterysis, thisthresholdporvidesacorrectvoltage for
the driving stage of the DMOS gate and the hyste-
rysis preventsinstabilities.
An externalbootstrapcapacitorchargeto12V byan
internal voltage referenceis neededto provide cor-
rect gate drive to the power DMOS. The driving cir-
cuit is able to source and sink peak currents of
around 0.5A to the gate of the DMOS transistor. A
typical switching time of the current in the DMOS
transistor is 50ns.Due to the fast commutationswit-
ching frequencies up to 200kHz are possible.
The PWM control loop consists of a sawtoothoscil-
lator, error amplifier, comparator, latchand the out-
put stage.An error signalis producedby comparing
theoutputvoltagewiththeprecise5.1V± 2% onchip
reference. This error signal is then compared with
the sawtooth oscillator in order to generate frixed
frequencypulse width modulated drive for the out-
put stage.APWM latch is included to eliminate mul-
tiple pulsing within a period even in noisy
environments.
The gain and stability oftheloop can be adjustedby
an external RC network connected to the output of
the error amplifier. A voltage feedforward control
has been added to the oscillator, this maintains su-
periorline regulation over a wide input voltage ran-
ge.Closingthe loop directlygives anoutputvol-tage
of 5.1V, higher voltages are obtainedby inserting a
voltage divider.
At turn on,outputovercurrentsare preventedby the
soft start function (fig. 2). The error amplifier is in-
itiallyclamped byan externalcapacitor,Css, and al-
lowed to rise linearlyunderthe chargeof an internal
constant current source.
Output overload protection is provided by a current
limit circuit. The load current is sensed bya internal
metalresistorconnectedtoa comparator.Whenthe
load current exceedsa preset threshold, theoutput
of the comparator sets a flip flop which turns off the
powerDMOS. The nextclockpulse,froman internal
40kHzoscillator,will resettheflip flopandthepower
DMOS will again conduct. This current protection
method,ensuresa constant currentoutputwhenthe
systemis overloadedor shortcircuitedandlimits the
switching frequency,in thiscondition,to40kHz.The
Reset and Power fail circuit (fig. 4), generates an
output signal when the supply voltage exceeds a
threshold programmed by an external voltage di-
vider. The reset signal, is generated with a delay
timeprogrammed by a externalcapacitoron the de-
lay pin. When the supply voltage falls below the
threshold or the outputvoltage goes below 5V, the
resetoutput goeslow immediately. The reset output
is an open drain.
Fig. 4A shows the case when the supply voltage is
higher than the threshold,but the output voltage is
not yet 5V.
Fig. 4Bshows the case when the outputis 5.1V,but
the supply voltage is not yet higher than the fixed
threshold.
The thermal protection disables circuit operation
when the junction temperature reaches about
150°C and has a hysterysis to prevent unstable
conditions.
CIRCUIT OPERATION
L4974A
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