Datasheet
stability of the loop can be adjusted by an exter-
nal RC network connected to the output of the er-
ror amplifier. A voltage feedforward control has
been added to the oscillator, this maintains supe-
rior line regulation over a wide input voltage
range. Closing the loop directly gives an output
voltage of 5.1V, higher voltages are obtained by
inserting a voltage divider.
At turn on output overcurrents are prevented by
the soft start function (fig. 2). The error amplifier is
initially clamped by an external capacitor Css and
allowed to rise linearly under the charge of an in-
ternal constant current source.
Output overload protection is provided by a cur-
rent limit circuit (fig. 3). The load current is sensed
by an internal metal resistor connected to a com-
parator. When the load current exceeds a preset
threshold the output of the comparator sets a flip
flop which turns off the power DMOS. The next
clock pulse, from an internal 40kHz oscillator will
reset the flip flop and the power DMOS will again
conduct. This current protection method, ensures
a constant current output when the system is
overloaded or short circuited and limits the
switching frequency, in this condition, to 40kHz.
The Reset and Power fail circuitry (fig 4) gener-
ates an output signal when the supply voltage ex-
ceeds a threshold programmed by an external
voltage divider. The reset signal, is generated
with a delay time programmed by an external ca-
pacitor on the delay pin. When the supply voltage
falls below the threshold or the output voltage
goes below 5V the reset output goes low immedi-
ately. The reset output is an open collector-drain.
Fig 4A shows the case when the supply voltage is
higher than the threshold, but the output voltage
is not yet 5V.
Fig 4B shows the case when the output is 5.1V
but the supply voltage is not yet higher than the
fixed threshold.
The thermal protection disables circuit operation
when the junction temperature reaches about
150°C and has an hysterysis to prevent unstable
conditions.
Figure 4: Reset and Power Fail Functions.
A
B
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