L6206 DMOS DUAL FULL BRIDGE DRIVER ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ OPERATING SUPPLY VOLTAGE FROM 8 TO 52V 5.6A OUTPUT PEAK CURRENT (2.8A DC) RDS(ON) 0.3Ω TYP.
L6206 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Test conditions Value Unit Supply Voltage VSA = VSB = VS 60 V Differential Voltage between VSA, OUT1A, OUT2A, SENSEA and VSB, OUT1B, OUT2B, SENSEB VSA = VSB = VS = 60V; VSENSEA = VSENSEB = GND 60 V OCDA,OCDB OCD pins Voltage Range -0.3 to +10 V PROGCLA, PROGCLB -0.3 to +7 V VS + 10 V VS VOD VBOOT PROGCL pins Voltage Range Bootstrap Peak Voltage VSA = VSB = VS VIN,VEN Input and Enable Voltage Range -0.
L6206 THERMAL DATA Symbol Description Rth-j-pins MaximumThermal Resistance Junction-Pins Rth-j-case Maximum Thermal Resistance Junction-Case PowerDIP24 SO24 PowerSO36 Unit 18 14 - °C/W - - 1 °C/W 43 51 - °C/W Rth-j-amb1 MaximumThermal Resistance Junction-Ambient Rth-j-amb1 Maximum Thermal Resistance Junction-Ambient 2 - - 35 °C/W Rth-j-amb1 MaximumThermal Resistance Junction-Ambient 3 - - 15 °C/W Rth-j-amb2 Maximum Thermal Resistance Junction-Ambient 4 58 77 62 °C/W
L6206 PIN DESCRIPTION PACKAGE SO24/ PowerDIP24 PowerSO36 PIN # PIN # 1 Name Type 10 IN1A Logic input Bridge A Logic Input 1. 2 11 IN2A Logic input Bridge A Logic Input 2. 3 12 SENSEA Power Supply Bridge A Source Pin. This pin must be connected to Power Ground directly or through a sensing power resistor. 4 13 OCDA Open Drain Output Bridge A Overcurrent Detection and thermal protection pin.
L6206 PIN DESCRIPTION (continued) PACKAGE SO24/ PowerDIP24 PowerSO36 PIN # PIN # 22 Name Type Function 7 VCP Output 23 8 ENA Logic Input Bridge A Enable. LOW logic level switches OFF all Power MOSFETs of Bridge A. If not used, it has to be connected to +5V. 24 9 PROGCLA R Pin Bridge A Overcurrent Level Programming. A resistor connected between this pin and Ground sets the programmable current limiting value for the bridge A. By connecting this pin to Ground the maximum current is set.
L6206 ELECTRICAL CHARACTERISTICS (continued) (Tamb = 25 °C, Vs = 48V, unless otherwise specified) Symbol IIH Parameter High Level Logic Input Current Vth(ON) Turn-on Input Threshold Vth(OFF) Turn-off Input Threshold Vth(HYS) Input Threshold Hysteresis Test Conditions Min Typ 7V Logic Input Voltage 1.8 Max Unit 10 µA 2.0 V 0.8 1.3 V 0.25 0.5 V 100 250 Switching Characteristics tD(on)EN Enable to out turn ON delay time (7) ILOAD =2.
L6206 Figure 1. Switching Characteristic Definition EN Vth(ON) Vth(OFF) t IOUT 90% 10% t D01IN1316 tFALL tD(OFF)EN tRISE tD(ON)EN Figure 2.
L6206 CIRCUIT DESCRIPTION POWER STAGES and CHARGE PUMP The L6206 integrates two independent Power MOS Full Bridges. Each Power MOS has an Rdson=0.3ohm (typical value @ 25°C), with intrinsic fast freewheeling diode. Cross conduction protection is achieved using a dead time (td = 1µs typical) between the switch off and switch on of two Power MOS in one leg of a bridge. Using N Channel Power MOS for the upper transistors in the bridge requires a gate drive voltage above the power supply voltage.
L6206 NON-DISSIPATIVE OVERCURRENT DETECTION AND PROTECTION In addition to the PWM current control, an overcurrent detection circuit (OCD) is integrated. This circuit can be used to provides protection against a short circuit to ground or between two phases of the bridge as well as a roughly regulation of the load current. With this internal over current detection, the external current sense resistor normally used and its associated power dissipation are eliminated. Fig.
L6206 Figure 7. Overcurrent Protection Simplified Schematic OUT1A VSA OUT2A POWER SENSE 1 cell HIGH SIDE DMOSs OF THE BRIDGE A I1A µC or LOGIC POWER DMOS n cells TO GATE LOGIC +5V RENA I1A / n I2A / n (I1A+I2A) / n CENA IREF INTERNAL OPEN-DRAIN OCDA POWER SENSE 1 cell POWER DMOS n cells + OCD COMPARATOR ENA I2A RDS(ON) 40Ω TYP. - 1.2V + OVER TEMPERATURE IREF PROGCLA, D02IN1354 RCLA. Figure 8.
L6206 Figure 9. Output Current Protection Threshold versus RCL Value 5 4.5 4 3.5 3 I SO VER 2.5 [A] 2 1.5 1 0.5 0 5k 10k 15k 20k 25k R C L [Ω ] 30k 35k 40k Figure 10. tDISABLE versus C EN and REN (VDD = 5V). R EN = 2 20 k Ω 3 1 .
L6206 Figure 11. tDELAY versus CEN (VDD = 5V). tdelay [µs] 10 1 0.1 1 10 Cen [nF] 100 THERMAL PROTECTION In addition to the Ovecurrent Detection, the L6206 integrates a Thermal Protection for preventing the device destruction in case of junction over temperature. It works sensing the die temperature by means of a sensible element integrated in the die. The device switch-off when the junction temperature reaches 165°C (typ. value) with 15°C hysteresis (typ. value).
L6206 APPLICATION INFORMATION A typical application using L6206 is shown in Fig. 12. Typical component values for the application are shown in Table 2. A high quality ceramic capacitor in the range of 100 to 200 nF should be placed between the power pins (VSA and VSB) and ground near the L6206 to improve the high frequency filtering on the power supply and reduce high frequency transients generated by the switching.
L6206 PARALLELED OPERATION The outputs of the L6206 can be paralleled to increase the output current capability or reduce the power dissipation in the device at a given current level. It must be noted, however, that the internal wire bond connections from the die to the power or sense pins of the package must carry current in both of the associated half bridges.
L6206 To operate the device in parallel and maintain a lower over current threshold, Half Bridge 1 and the Half Bridge 2 of the Bridge A can be connected in parallel and the same done for the Bridge B as shown in Figure 14. In this configuration, the peak current for each half bridge is still limited by the bond wires for the supply and sense pins so the dissipation in the device will be reduced, but the peak current rating is not increased.
L6206 It is also possible to parallel the four Half Bridges to obtain a simple Half Bridge as shown in Fig. 15. In this configuration the, the over current threshold is equal to twice the minimum threshold set by the resistors RCLA or RCLB in Figure 15. It is recommended to use RCLA = RCLB. The resulting half bridge has the following characteristics. - Equivalent Device: HALF BRIDGE - RDS(ON) 0.075Ω Typ. Value @ TJ = 25°C - 5.6A max RMS Load Current - 11.2A max OCD Threshold Figure 15.
L6206 OUTPUT CURRENT CAPABILITY AND IC POWER DISSIPATION In Fig. 16 and Fig. 17 are shown the approximate relation between the output current and the IC power dissipation using PWM current control driving two loads, for two different driving types: – One Full Bridge ON at a time (Fig.16) in which only one load at a time is energized. – Two Full Bridges ON at the same time (Fig.17) in which two loads at the same time are energized.
L6206 Figure 18. Mounting the PowerSO package. Slug soldered to PCB with dissipating area Slug soldered to PCB with dissipating area plus ground layer Slug soldered to PCB with dissipating area plus ground layer contacted through via holes Figure 19. PowerSO36 Junction-Ambient thermal resistance versus on-board copper area.
L6206 Figure 22. Typical Quiescent Current vs. Supply Voltage Figure 25. Typical High-Side RDS(ON) vs. Supply Voltage Iq [m A] RDS(ON) [Ω] 5.6 fsw = 1kHz 0.380 Tj = 25°C 0.376 Tj = 85°C 5.4 0.372 Tj = 25°C 0.368 Tj = 125°C 0.364 5.2 0.360 0.356 5.0 0.352 0.348 4.8 0.344 0.340 0.336 4.6 0 10 20 30 V S [V] 40 50 0 60 5 10 15 20 25 30 VS [V] Figure 23. Normalized Typical Quiescent Current vs. Switching Frequency Figure 26. Normalized RDS(ON) vs.
L6206 DIM. A a1 a2 a3 b c D (1) D1 E e e3 E1 (1) E2 E3 E4 G H h L N S MIN. mm TYP. 0.10 0 0.22 0.23 15.80 9.40 13.90 MAX. 3.60 0.30 3.30 0.10 0.38 0.32 16.00 9.80 14.50 inch TYP. MIN. 0.004 0 0.008 0.009 0.622 0.370 0.547 0.65 11.05 10.90 0.0256 0.435 11.10 0.429 2.90 6.20 0.228 3.20 0.114 0.10 0 15.90 0.610 1.10 1.10 0.031 10°(max.) 8 °(max.) 5.80 2.90 0 15.50 0.80 OUTLINE AND MECHANICAL DATA MAX. 0.141 0.012 0.130 0.004 0.015 0.012 0.630 0.385 0.570 0.437 0.114 0.244 0.126 0.004 0.626 0.
L6206 mm DIM. MIN. TYP. A A1 inch MAX. MIN. TYP. 4.320 0.380 A2 0.170 0.015 3.300 0.130 B 0.410 0.460 0.510 0.016 0.018 0.020 B1 1.400 1.520 1.650 0.055 0.060 0.065 c 0.200 0.250 0.300 0.008 0.010 0.012 D 31.62 31.75 31.88 1.245 1.250 1.255 E 7.620 8.260 0.300 e 2.54 E1 6.350 e1 L 6.600 M 0.325 0.100 6.860 0.250 0.260 0.270 0.300 7.620 3.180 OUTLINE AND MECHANICAL DATA MAX. 3.430 0.125 0.135 Powerdip 24 0˚ min, 15˚ max.
L6206 mm inch DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.10 0.30 0.004 0.012 B 0.33 0.51 0.013 0.200 C 0.23 0.32 0.009 0.013 D (1) 15.20 15.60 0.598 0.614 E 7.40 7.60 0.291 0.299 e 1.27 10.0 10.65 0.394 0.419 h 0.25 0;75 0.010 0.030 L 0.40 1.27 0.016 0.050 ddd Weight: 0.60gr 0.050 H k OUTLINE AND MECHANICAL DATA 0˚ (min.), 8˚ (max.) 0.10 0.004 (1) “D” dimension does not include mold flash, protusions or gate burrs.
L6206 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice.
