Datasheet

Register mapping LIS3LV02DL
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6 Register mapping
The table given below provides a listing of the 8 bit registers embedded in the device and
the related addresses.
Table 15. Registers address map
Register name Type
Register address
Default Comment
Binary Hex
rw 0000000 - 0001110 00 - 0E Reserved
WHO_AM_I r 0001111 0F 00111010 Dummy register
rw 0010000 - 0010101 10-15 Reserved
OFFSET_X rw 0010110 16 Calibration Loaded at boot
OFFSET_Y rw 0010111 17 Calibration Loaded at boot
OFFSET_Z rw 0011000 18 Calibration Loaded at boot
GAIN_X rw 0011001 19 Calibration Loaded at boot
GAIN_Y rw 0011010 1A Calibration Loaded at boot
GAIN_Z rw 0011011 1B Calibration Loaded at boot
0011100 -0011111 1C-1F Reserved
CTRL_REG1 rw 0100000 20 00000111
CTRL_REG2 rw 0100001 21 00000000
CTRL_REG3 rw 0100010 22 00001000
HP_FILTER RESET r 0100011 23 dummy Dummy register
0100100-0100110 24-26 Not Used
STATUS_REG rw 0100111 27 00000000
OUTX_L r 0101000 28 output
OUTX_H r 0101001 29 output
OUTY_L r 0101010 2A output
OUTY_H r 0101011 2B output
OUTZ_L r 0101100 2C output
OUTZ_H r 0101101 2D output
r 0101110 2E Reserved
0101111 2F Not Used
FF_WU_CFG rw 0110000 30 00000000
FF_WU_SRC rw 0110001 31 00000000
FF_WU_ACK r 0110010 32 dummy Dummy register
0110011 33 Not Used
FF_WU_THS_L rw 0110100 34 00000000