Datasheet

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In Big Endian Mode (bit BLE in CTRL_REG2 set to ‘1’) the content of this register is the

MSB acceleration data and depends on bit DAS in CTRL_REG2 register as described in the

following section.

7.16 OUTY_H (2Bh)

When reading the register in “12 bit right justified” mode the most significant bits (15:12) are

replaced with bit 11 (i.e. YD15-YD12=YD11, YD11, YD11, YD11).

In Big Endian Mode (bit BLE in CTRL_REG2 set to ‘1’) the content of this register is the LSB

acceleration data.

7.17 OUTZ_L (2Ch)

In Big Endian Mode (bit BLE in CTRL_REG2 set to ‘1’) the content of this register is the

MSB acceleration data and depends on bit DAS in CTRL_REG2 register as described in the

following section.

7.18 OUTZ_H (2Dh)

When reading the register in “12 bit right justified” mode the most significant bits (15:12) are

replaced with bit 11 (i.e. ZD15-ZD12=ZD11, ZD11, ZD11, ZD11).

Table 43. Register description (2Ah)

YD7, YD0 Y axis acceleration data LSB

Table 44. Register (2Bh)

YD15 YD14 YD13 YD12 YD11 YD10 YD9 YD8

Table 45. Register description (2Bh)

YD15, YD8 Y axis acceleration data MSB

Table 46. Register (2Ch)

ZD7 ZD6 ZD5 ZD4 ZD3 ZD2 ZD1 ZD0

Table 47. Register description (2Ch)

ZD7, ZD0 Z axis acceleration data LSB

Table 48. Register (2Dh)

ZD15 ZD14 ZD13 ZD12 ZD11 ZD10 ZD9 ZD8

Table 49. Register description (2Dh)

ZD15, ZD8 Z axis acceleration data MSB