Datasheet

M24C16, M24C08, M24C04, M24C02, M24C01 Signal description
Doc ID 5067 Rev 16 9/39
2.4 Supply voltage (V
CC
)
2.4.1 Operating supply voltage V
CC
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
voltage
within the specified [V
CC
(min), V
CC
(max)] range must be applied (see Tabl e 6, Ta bl e 7 and
Tabl e 8). In order to secure a stable DC supply voltage, it is recommended to decouple the
V
CC
line with a suitable capacitor (usually of the order of 10 nF to 100 nF) close to the
V
CC
/V
SS
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
W
).
2.4.2 Power-up conditions
The V
CC
voltage has to rise continuously from 0 V up to the minimum V
CC
operating voltage
defined in
Ta bl e 6, Tabl e 7 and Tabl e 8 and the rise time must not vary faster than 1 V/µs.
2.4.3 Device reset
In order to prevent inadvertent write operations during power-up, a power-on-reset (POR)
circuit is included. At power-up (continuous rise of V
CC
), the device does not respond to any
instruction until V
CC
reaches the power-on-reset threshold voltage (this threshold is lower
than the minimum V
CC
operating voltage defined in Tabl e 6, Tabl e 7 and Ta ble 8). When
V
CC
passes over the POR threshold, the device is reset and enters the Standby Power
mode. The device, however, must not be accessed until V
CC
reaches a valid and stable V
CC
voltage within the specified [V
CC
(min), V
CC
(max)] range.
In a similar way, during power-down (continuous decrease in V
CC
), as soon as V
CC
drops
below the power-on-reset threshold voltage, the device stops responding to any instruction
sent to it.
2.4.4 Power-down conditions
During power-down (continuous decrease in V
CC
), the device must be in the Standby Power
mode (mode reached after decoding a Stop condition, assuming that there is no internal
write cycle in progress).
Figure 5. Maximum R
P
value versus bus parasitic capacitance (C) for an I²C bus
1
10
100
10 100 1000
Bus line capacitor (pF)
Bus line pull-up resistor
(k
)
When t
LOW
= 1.3 µs (min value for
f
C
= 400 kHz), the R
bus
× C
bus
time constant must be below the
400 ns time constant line
represented on the left.
I²C bus
master
M24xxx
R
bus
V
CC
C
bus
SCL
SDA
ai14796b
R
bus
× C
bus
= 400 ns
Here R
bus
× C
bus
= 120 ns
4 kΩ
30 pF