M41T00S Serial real-time clock Features ■ 2.0 to 5.5 V clock operating voltage ■ Counters for seconds, minutes, hours, day, date, month, year, and century ■ Software clock calibration ■ Automatic switchover and deselect circuitry (fixed reference) – VCC = 2.7 to 5.5 V 2.5 V ≤ VPFD ≤ 2.
Contents M41T00S Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 3 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.1 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1.
M41T00S List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 TIMEKEEPER® register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Preferred default values . . . . . . . . . . . . . . . . . . .
List of figures M41T00S List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. 4/28 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 8-pin SOIC connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block diagram . . .
M41T00S 1 Description Description The M41T00S is a low-power serial real-time clock (RTC) with a built-in 32.768 kHz oscillator (external crystal controlled). Eight bytes of the SRAM (see Table 2 on page 13) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. Addresses and data are transferred serially via a two line, bidirectional I2C interface. The built-in address register is incremented automatically after each WRITE or READ data byte.
Description Figure 2. M41T00S 8-pin SOIC connections 1 8 7 2 3 M41T00S 6 4 5 XI XO VBAT VSS VCC FT/OUT(1) SCL SDA AI09166 1. Open drain output Figure 3. Block diagram REAL TIME CLOCK CALENDAR 32KHz OSCILLATOR CRYSTAL OSCILLATOR FAIL CIRCUIT RTC & CALIBRATION FREQUENCY TEST SDA FT FT/OUT(1) 2 I C INTERFACE SCL OUTPUT DRIVER WRITE PROTECT VCC OUT INTERNAL POWER VBAT VSO COMPARE VPFD AI09168 1.
M41T00S 2 Operation Operation The M41T00S clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 8 bytes contained in the device can then be accessed sequentially in the following order: 1. Seconds register 2. Minutes register 3. Century/hours register 4. Day register 5. Date register 6. Month register 7. Year register 8.
Operation 2.1.3 M41T00S Stop data transfer A change in the state of the data line, from low to high, while the clock is high, defines the STOP condition. 2.1.4 Data valid The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the high period of the clock signal. The data on the line may be changed during the low period of the clock signal. There is one clock pulse per bit of data.
M41T00S Figure 5. Operation Acknowledgement sequence CLOCK PULSE FOR ACKNOWLEDGEMENT START SCL FROM MASTER 1 DATA OUTPUT BY TRANSMITTER 2 8 MSB 9 LSB DATA OUTPUT BY RECEIVER AI00601 2.2 READ mode In this mode the master reads the M41T00S slave after setting the slave address (see Figure 7 on page 10). Following the WRITE mode control bit (R/W=0) and the acknowledge bit, the word address 'An' is written to the on-chip address pointer.
Operation R/W DATA n+1 ACK DATA n ACK BUS ACTIVITY: S ACK WORD ADDRESS (An) ACK S R/W SDA LINE ACK BUS ACTIVITY: MASTER START READ mode sequence START Figure 7. M41T00S SLAVE ADDRESS STOP SLAVE ADDRESS P AI00899 NO ACK DATA n+X R/W SLAVE ADDRESS 2.3 DATA n+X P NO ACK BUS ACTIVITY: DATA n+1 ACK DATA n ACK S ACK SDA LINE ACK BUS ACTIVITY: MASTER STOP Alternative READ mode sequence START Figure 8.
M41T00S 2.4 Operation Data retention mode With valid VCC applied, the M41T00S can be accessed as described above with READ or WRITE cycles. Should the supply voltage decay, the power input will be switched from the VCC pin to the battery when VCC falls below the battery backup switchover voltage (VSO). At this time the clock registers will be maintained by the attached battery supply. On power-up, when VCC returns to a nominal value, write protection continues for tREC.
Clock operation 3 M41T00S Clock operation The 8-byte register map (see Table 2) is used to both set the clock and to read the date and time from the clock, in a binary coded decimal format. Seconds, minutes, and hours are contained within the first three registers. Bits D6 and D7 of clock register 02h (century/hours register) contain the CENTURY ENABLE bit (CEB) and the CENTURY bit (CB).
M41T00S Table 2.
Clock operation M41T00S Therefore, each calibration step has the effect of adding 512 or subtracting 256 oscillator cycles for every 125,829,120 actual oscillator cycles, that is +4.068 or –2.034 ppm of adjustment per calibration step in the calibration register (see Figure 11 on page 15). Assuming that the oscillator is running at exactly 32,768 Hz, each of the 31 increments in the calibration byte would represent +10.7 or –5.35 seconds per month which corresponds to a total range of +5.5 or –2.
M41T00S Clock operation Figure 10. Crystal accuracy across temperature Frequency (ppm) 20 0 –20 –40 –60 ΔF = K x (T – T )2 O F –80 2 2 K = –0.036 ppm/°C ± 0.006 ppm/°C –100 TO = 25°C ± 5°C –120 –140 –160 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 Temperature °C AI07888 Figure 11. Clock calibration NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION AI00594B 3.2.1 Century bit Bits D7 and D6 of clock register 02h contain the CENTURY ENABLE bit (CEB) and the CENTURY bit (CB).
Clock operation M41T00S In the event the OF bit is found to be set to '1' at any time other than the initial power-up, the STOP bit (ST) should be written to a '1,' then immediately reset to '0.' This will restart the oscillator. The following conditions can cause the OF bit to be set: ● The first time power is applied (defaults to a '1' on power-up). ● The voltage present on VCC is insufficient to support oscillation. ● The ST bit is set to '1.' ● External interference of the crystal.
M41T00S 4 Maximum ratings Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 4.
DC and AC parameters 5 M41T00S DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC Characteristic tables are derived from tests performed under the Measurement Conditions listed in the relevant tables. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. Table 5.
M41T00S Table 7. DC and AC parameters DC characteristics Sym Test condition(1) Parameter ILI Input leakage current ILO Output leakage current ICC1 Supply current Min Typ 0 V ≤ VIN ≤ VCC Max Unit ±1 μA 0 V ≤ VOUT ≤ VCC ±1 μA Switch freq = 400 kHz 300 μA SCL = 0 Hz All Inputs ≥ VCC – 0.2 V ≤ VSS + 0.2 V 70 μA ICC2 Supply current (standby) VIL Input low voltage –0.3 0.3VCC V VIH Input high voltage 0.7VCC VCC + 0.3 V IOL = 3.0 mA 0.4 V IOL = 10 mA 0.4 V FT/OUT 5.
DC and AC parameters Table 9. M41T00S Power down/up AC characteristics Parameter(1)(2) SCL and SDA at VIH before power-down Symbol tPD trec Min 0 SCL and SDA at VIH after power-up Typ Max Unit nS 10 µS 1. VCC fall time should not exceed 5 mV/µs. 2. Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = 2.7 to 5.5 V (except where noted). Table 10. Power down/up trip points DC characteristics Parameter(1)(2) Sym VPFD VSO Power-fail deselect Min Typ Max Unit 2.5 2.6 2.
M41T00S DC and AC parameters Table 11. AC characteristics Parameter(1) Sym Min 0 Typ Max Units 400 kHz fSCL SCL clock frequency tLOW Clock low period 1.
Package mechanical information 6 M41T00S Package mechanical information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 15. SO8 – 8-lead plastic small package outline h x 45˚ A2 A c ccc b e 0.
M41T00S Table 12. Package mechanical information SO8 – 8-lead plastic small outline (150 mils body width), package mechanical data mm inches Symb Typ Min Max A1 0.10 0.25 A2 1.25 B 0.28 0.48 0.011 0.019 C 0.17 0.23 0.007 0.009 A Typ Min Max 0.004 0.010 1.75 0.069 0.049 D 4.90 4.80 5.00 0.189 0.197 E 6.00 5.80 6.20 0.228 0.244 E1 3.90 3.80 4.00 0.150 0.157 e 1.27 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 0° 8° L1 0.050 1.04 0.
Package mechanical information M41T00S Figure 16. Carrier tape for SO8 (150 mils body width) package P0 E P2 D T A0 F TOP COVER TAPE W B0 P1 CENTER LINES OF CAVITY K0 USER DIRECTION OF FEED AM03073v1 Table 13. Carrier tape dimensions for SO8 (150 mils body width) package Package W D SO8 12.00 ±0.30 1.50 +0.10/ –0.00 24/28 E P0 P2 F 1.75 4.00 2.00 5.50 ±0.10 ±0.10 ±0.10 ±0.05 A0 B0 K0 P1 T 6.50 ±0.10 5.30 ±0.10 2.20 ±0.10 8.00 ±0.10 0.30 ±0.
M41T00S Package mechanical information Figure 17. Reel schematic T 40mm min. Access hole At slot location B D C N A G measured Tape slot In core for Full radius Tape start 2.5mm min.width At hub AM04928v1 Table 14. Reel dimensions for 12 mm carrier tape - SO8 package (150 mils body width) A B (max) (min) 330 mm (13-inch) 1.5 mm Note: C 13 mm ± 0.2 mm D N (min) (min) 20.2 mm 60 mm G 12.4 mm + 2/–0 mm T (max) 18.
Part numbering 7 M41T00S Part numbering Table 15. Ordering information scheme Example: M41T 00S M 6 F Device type M41T Supply voltage and write protect voltage 00S = VCC = 2.7 to 5.5 V Package M = SO8 Temperature range 6 = –40 °C to 85 °C Shipping method E = ECOPACK® package, tubes(1) F = ECOPACK® package, tape & reel 1. Not recommended for new design. Contact local ST sales office for availability.
M41T00S 8 Revision history Revision history Table 16. Document revision history Date Revision 10-Feb- 2004 0.1 First draft 20-Feb-2004 0.2 Update characteristics (Table 9, 10, 5, 7, 15) 14-Apr-2004 1.0 Product promoted; reformatted; update characteristics, including Lead-free package information (Figure 4, 10; Table 4, 11, 15) 05-May-2004 1.1 Update DC characteristics (Table 7) 16-Jun-2004 1.2 Added package shipping (Table 15) 13-Sep-2004 2.
M41T00S Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale.
