Datasheet

ManualsBrandsST ManualsClockRTC IC 16B LCC I²C/Serial

3.2 mm

1.5 mm

3mm

Embedded crystal LCC8 1.5 x 3.2 mm

No external crystal required

QFN16 3 x 3 mm

Features

• Serial real-time clock (RTC) with alarm functions

– 400 kHz I²C serial interface

– Memory mapped registers for seconds, minutes, hours, day, date, month,

year, and century

– Tenths/hundredths of second register

• 350 nA timekeeping current at 3 V

• Time keeping down to 1.0 V

• 1.3 V to 4.4 V I²C bus operating voltage

– 4.4 V max. V

suitable for lithium-ion battery operation

• Low operating current of 35 µA (at 400 kHz I²C speed)

• 32 kHz square wave output is on at power-up. Suitable for driving a

microcontroller in low-power mode. Can be disabled. (M41T62/64)

• Programmable 1 Hz to 32 kHz square wave output (M41T62/64)

• Programmable alarm with interrupt function (M41T62/65)

• 32 kHz crystal oscillator integrates crystal load capacitors, works with high

series resistance crystals

• Oscillator stop detection monitors clock operation

• Accurate programmable watchdog

– 62.5 ms to 31 minutes timeout

• Software clock calibration. Timekeeping can be adjusted within ± 2 parts per

million (± 5 seconds per month)

• Automatic leap year compensation

• – 40 to + 85 °C operation

• Two package options

– Very small 3 x 3 mm, lead-free and halogen-free (ECOPACK2) 16-lead

QFN

– Ultra small 1.5 x 3.2 mm, lead-free and halogen-free (ECOPACK2) 8-pin

ceramic leadless chip carrier with embedded 32 kHz crystal - no external

oscillator components required (M41T62)

Maturity status link

M41T62

M41T64

M41T65

Low-power serial real-time clocks (RTCs) with alarm

M41T62, M41T64, M41T65

Datasheet

DS3840 - Rev 24 - September 2019

For further information contact your local STMicroelectronics sales office.

www.st.com

Summary of content (42 pages)

PAGE 1
M41T62, M41T64, M41T65 Datasheet Low-power serial real-time clocks (RTCs) with alarm Features 3mm 3mm • QFN16 3 x 3 mm 1.5 mm 3.2 mm Embedded crystal LCC8 1.5 x 3.
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M41T62, M41T64, M41T65 Description 1 Description The M41T6x is a low-power serial real-time clock (RTC) with a built-in 32.768 kHz oscillator. Eight registers are used for the clock/calendar function and are configured in binary-coded decimal (BCD) format. Further eight registers provide status/control of alarm, 32 kHz output, calibration, and watchdog functions. Addresses and data are transferred serially via a two-line, bidirectional I²C interface.
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M41T62, M41T64, M41T65 Description Figure 2. M41T64 logic diagram VCC XI SQW(1) XO M41T64 SCL F32K(2) SDA VSS 1. 2. Open drain. Defaults to 32 kHz on power-up. Figure 3. M41T65 logic diagram VCC XI WDO(1) XO M41T65 SCL (1) IRQ/FT/OUT SDA VSS 1. Open drain. 1. 2. DS3840 - Rev 24 VSS 3 SQW(1) 4 NC VCC NC 13 QFN 5 6 7 8 NC 2 14 NC XO 15 NC 1 16 VSS XI NC Figure 4.
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M41T62, M41T64, M41T65 Description 1. 2. NC NC VCC NC Figure 5. M41T64 connections 16 15 14 13 XO 2 11 SQW(2) VSS 3 10 SCL F32K(1) 4 9 SDA 5 6 7 8 NC NC NC 12 NC 1 VSS XI Enabled on power-up. Open drain. 1. NC NC VCC NC Figure 6. M41T65 connections 16 15 14 13 XO 2 11 (1) IRQ/FT/OUT VSS 3 10 SCL WDO(1) 4 9 SDA 5 6 7 8 NC NC NC 12 NC 1 VSS XI Open drain. Table 2.
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M41T62, M41T64, M41T65 Description Figure 7. M41T62 block diagram REAL TIME CLOCK CALENDAR (3) XTAL (3) 32 kHz OSCILLATOR OSCILLATOR FAIL OFIE DETECT RTC W/ALARM SDA I²C INTERFACE SCL 1. 2. 3. AFE IRQ/OUT (1) SQWE SQW (2) WATCHDOG SQUARE WAVE Open drain. Defaults to 32 kHz on power-up. Not bonded on embedded crystal (LCC) package. Figure 8. M41T64 block diagram 32KE REAL TIME CLOCK CALENDAR XTAL 32 kHz OSCILLATOR F32K (1) OSCILLATOR FAIL DETECT RTC W/ALARM SDA I²C INTERFACE SCL 1. 2.
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M41T62, M41T64, M41T65 Description Figure 10. Hardware hookup for SuperCap™ backup operation POWER SUPPLY VCC (1) D1 + – Ro LEAKAGE PATH M41T6x VCC XI XO VSS 1. 2. 3. 4. Note: DS3840 - Rev 24 D2 (2) IRQ/FT/OUT (3) WDO (4) SQW MCU VCC Port Reset Input SQWIN SCL Serial Clock Line SDA Serial Data Line F32K 32KHz CLKIN Diode D2 is required on open drain pin (M41T65 only) when SuperCap (or battery) backup is being used. Low threshold BAT42 Schottky diode is recommended (see note below).
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M41T62, M41T64, M41T65 Operation 2 Operation The M41T6x clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 16 bytes contained in the device can then be accessed sequentially in the following order: 2.
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M41T62, M41T64, M41T65 READ mode 2.1.5 Acknowledge Each byte of eight bits is followed by one acknowledge bit. This acknowledge bit is a low level put on the bus by the receiver whereas the master generates an extra acknowledge related clock pulse. A slave receiver which is addressed is obliged to generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter.
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M41T62, M41T64, M41T65 READ mode The system-to-user transfer of clock data will be halted whenever the address being read is a clock address (00h to 07h). The update will resume due to a stop condition or when the pointer increments to any non-clock address (08h-0Fh). Note: This is true both in READ mode and WRITE mode. An alternate READ mode may also be implemented whereby the master reads the M41T6x slave without first writing to the (volatile) address pointer.
PAGE 10
M41T62, M41T64, M41T65 WRITE mode 2.3 WRITE mode In this mode the master transmitter transmits to the M41T6x slave receiver. Bus protocol is shown in Figure 16. WRITE mode sequence. Following the START condition and slave address, a logic '0' (R/W̅=0) is placed on the bus and indicates to the addressed device that word address “An” will follow and is to be written to the on-chip address pointer.
PAGE 11
M41T62, M41T64, M41T65 Clock operation 3 Clock operation The M41T6x is driven by a quartz-controlled oscillator with a nominal frequency of 32.768 kHz. The accuracy of the real-time clock depends on the frequency of the quartz crystal that is used as the time-base for the RTC. The eight byte clock register (see Table 3. M41T62 register map, Table 4. M41T64 register map, and Table 5.
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M41T62, M41T64, M41T65 RTC registers Figure 17. Buffer/transfer registers CLOCK COUNTERS ARE ACCES S ED INDIRECTLY THRU BUFFER/TRANS FER REGIS TERS AT S TART OF READ, UDATES FROM COUNTERS ARE HALTED AND P RES ENT TIME IS FROZEN IN BUFFER/TRANS FER REGIS TERS.
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M41T62, M41T64, M41T65 RTC registers Table 3. M41T62 register map Addr D7 00h D6 D5 D4 D3 0.1 seconds D2 D1 D0 Function/range BCD format 0.
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M41T62, M41T64, M41T65 RTC registers Table 4. M41T64 register map Addr D7 00h D6 D5 D4 D3 0.1 seconds D2 D1 D0 Function/range BCD format 0.
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M41T62, M41T64, M41T65 RTC registers Table 5. M41T65 register map Addr D7 D6 00h D5 D4 D3 0.1 seconds D2 D1 D0 Function/range BCD format 0.
PAGE 16
M41T62, M41T64, M41T65 Calibrating the clock 3.2 Calibrating the clock The M41T6x real-time clock is driven by a quartz controlled oscillator with a nominal frequency of 32.768 kHz. This provides the time-base for the RTC. The accuracy of the clock depends on the frequency accuracy of the crystal, and the match between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was trimmed. The M41T6x oscillator is designed for use with a 6 - 7 pF crystal load capacitance.
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M41T62, M41T64, M41T65 Setting alarm clock registers Figure 18. Crystal accuracy across temperature Frequency (ppm) 20 0 –20 –40 –60 DF = K x (T – T)2 O F –80 2 2 K = –0.036 ppm/ °C ± 0.006 ppm/ °C –100 TO = 25°C ± 5°C –120 –140 –160 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 Temperature °C Figure 19. Calibration waveform NORMAL POSITIVE CALIBRATION NEGATIVE CALIBRATION 3.3 Setting alarm clock registers Address locations 0Ah-0Eh contain the alarm settings.
PAGE 18
M41T62, M41T64, M41T65 Watchdog timer Figure 20. Alarm interrupt reset waveform 0Eh Register address 0Fh 00h ALARM FLAG BIT (AF) HIGH-Z IRQ/OUT or IRQ/FT/OUT Table 6. Alarm repeat modes 3.
PAGE 19
M41T62, M41T64, M41T65 Watchdog output ( 3.5 WDO - M41T65 only) Watchdog output ( WDO - M41T65 only) If the processor does not reset the watchdog timer within the specified period, the watchdog output ( WDO ) will pulse low for trec (see Table 7. Square wave output frequency). This output may be connected to the reset input of the processor in order to generate a processor reset.
PAGE 20
M41T62, M41T64, M41T65 Century bits 3.8 Century bits The two century bits, CB1 and CB0, are bits D7 and D6, respectively, in the century/month register at address 06h. Together, they comprise a 2-bit counter which increments at the turn of each century. CB1 is the most significant bit. The user may arbitrarily assign the meaning of CB1:CB0 to represent any century value, but the simplest way of using these bits is to extend the year register (07h) by mapping them directly to bits 9 and 8.
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M41T62, M41T64, M41T65 Oscillator stop detection 3.11 Oscillator stop detection If the oscillator fail (OF) bit is internally set to a '1,' this indicates that the oscillator has either stopped, or was stopped for some period of time and can be used to judge the validity of the clock and date data. This bit will be set to '1' any time the oscillator stops.
PAGE 22
M41T62, M41T64, M41T65 Maximum ratings 4 Maximum ratings Stressing the device above the rating listed in the absolute maximum ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 10.
PAGE 23
M41T62, M41T64, M41T65 DC and AC parameters 5 DC and AC parameters This section summarizes the operating and measurement conditions, as well as the DC and AC characteristics of the device. The parameters in the following DC and AC characteristic tables are derived from tests performed under the measurement conditions listed in the relevant tables. Designers should check that the operating conditions in their projects match the measurement conditions when using the quoted parameters. Table 11.
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M41T62, M41T64, M41T65 DC and AC parameters Table 12. Capacitance Parameter (1) (2) Symbol CIN COUT (3) tLP Min. Max. Unit Input capacitance - 7 pF Output capacitance - 10 pF Low-pass filter input time constant (SDA and SCL) - 50 ns 1. At 25°C, f = 1 MHz. 2. Effective capacitance measured with power supply at 3.6 V; sampled only, not 100% tested. 3. Outputs deselected. Table 13. DC characteristics Sym VCC Test condition(1) Parameter (2) Operating voltage Min. Typ.
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M41T62, M41T64, M41T65 DC and AC parameters Table 14. Crystal electrical characteristics Parameter (1) (2) Sym Min. Typ. - 32.768 fO Resonant frequency RS Series resistance (TA = –40 to 70 °C, oscillator startup at 2.0 V) - CL Load capacitance - Max. Units kHz 75 (3) (4) 6 kΩ pF 1. Load capacitors are integrated within the M41T6x. Circuit board layout considerations for the 32.768 kHz crystal of minimum trace lengths and isolation from RF generating signals should be taken into account.
PAGE 26
M41T62, M41T64, M41T65 DC and AC parameters Sym Cd Parameter Conditions Min. Typ. XOUT capacitance Max. 12 IC-to-IC frequency variation (1) (2) Unit pF –10 +10 ppm 1. Devices in LCC8 package ((M41T62LC6F) are tested not to exceed ±20 ppm oscillator frequency error at 25 °C, which equates to about 52 seconds per month. 2. Reference value. TA = 25 °C, VCC = 3.0 V, CMJ-145 (CL = 6 pF, 32.768 Hz) manufactured by Citizen, CL = Cg · Cd / (Cg + Cd). Figure 24.
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M41T62, M41T64, M41T65 Package information 6 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.
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M41T62, M41T64, M41T65 QFN16 package information 6.1 QFN16 package information Figure 25. QFN16 — 16-pin, quad, flat package, no-lead, 3x3 mm, package outline 7509604_4 Note: DS3840 - Rev 24 Drawing is not to scale.
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M41T62, M41T64, M41T65 QFN16 package information Table 18. QFN16 — 16-pin, quad, flat package, no-lead, 3x3 mm, package mechanical data Symbol mm Min. Typ. Max. Min. Typ. Max. A 0.80 0.90 1.00 0.032 0.035 0.039 A1 0.00 0.02 0.05 0.000 0.001 0.002 A3 b 0.20 0.18 D D2 E2 1.55 0.30 0.007 1.70 1.55 1.70 1.80 0.061 0.30 0.012 0.067 0.071 0.118 1.80 0.061 0.50 0.20 0.010 0.118 3.00 e L 0.25 0.008 3.00 E DS3840 - Rev 24 inches 0.067 0.071 0.020 0.40 0.008 0.
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M41T62, M41T64, M41T65 QFN16 package information Figure 26. QFN16 — 16-pin, quad, flat package, no-lead, 3 x 3 mm recommended footprint Note: DS3840 - Rev 24 Dimensions shown are in millimeters (mm).
PAGE 31
M41T62, M41T64, M41T65 LCC8 package information 6.2 LCC8 package information Figure 27. LCC8 — 8-pin, 1.5 x 3.2 mm leadless chip carrier package outline 8241725_2 Table 19. LCC8 — 8-pin, 1.5 x 3.2 mm leadless chip carrier package mechanical data Symbol mm Min. Typ. A Max. Min. Typ. 0.80 Max. 0.031 b 0.30 0.40 0.50 0.012 0.016 0.020 D 1.40 1.50 1.60 0.055 0.059 0.063 D1 0.40 0.50 0.60 0.016 0.020 0.024 E 3.10 3.20 3.30 0.122 0.126 0.130 E1 2.20 2.30 2.40 0.087 0.
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M41T62, M41T64, M41T65 LCC8 package information Figure 28. LCC8 — 8-pin, 1.5 x 3.2 mm leadless chip carrier recommended footprint 0.9 0.9 0.9 2.0 0.8 0.4 0.8 0.5 3.2 Note: DS3840 - Rev 24 Dimensions shown are typical values, in millimeters (mm).
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M41T62, M41T64, M41T65 Packing information 7 Packing information 7.1 QFN16 carrier tape Figure 29. Carrier tape for QFN16 3 x 3 mm package P0 E P2 D T A0 F TOP COVER TAPE W B0 P1 CENTER LINES OF CAVI TY K0 USER DIRECTION OF FEED Table 20. Carrier tape dimensions for QFN16 3 x 3 mm package Package QFN16 DS3840 - Rev 24 W 12.00 ±0.30 D 1.50 +0.10 /-0.00 E P0 P2 F A0 B0 K0 P1 T 1.75 4.00 2.00 5.50 3.30 3.30 1.10 8.00 0.30 ±0.10 ±0.10 ±0.10 ±0.05 ±0.10 ±0.10 ±0.
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M41T62, M41T64, M41T65 LCC8 carrier tape 7.2 LCC8 carrier tape 0.3 ±0.02 76 04 76 04 12 ±0.2 1.75 ±0.1 5.5 ±0.05 3.45 ±0.1 Ø1 2 ±0.1 Ø1 .5 ± 0 .5 ± 0 .1 4 ±0.1 .1 Figure 30. Carrier tape for LCC8 1.5 x 3.2 mm package 4 ±0.1 1.75 ±0.1 User Direction of Feed Note: Dimensions shown are in millimeters (mm). 7.3 Reel information for QFN16 and LCC8 Figure 31. Reel schematic T 40m m m in.
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M41T62, M41T64, M41T65 Reel information for QFN16 and LCC8 Table 21. Reel dimensions for 12 mm carrier tape - QFN16 and LCC8 packages Package QFN16 LCC8 Note: DS3840 - Rev 24 A B (max) (min) 330 mm (13-inch) 180 mm (7-inch) 1.5 mm 1.5 mm C 13 mm ± 0.2 mm 13 mm ± 0.2 mm D N (min) (min) 20.2 mm 60 mm 20.2 mm 60 mm G 12.4 mm + 2/–0 mm 12.4 mm + 2/–0 mm T (max) 18.4 mm 18.4 mm The dimensions given in Table 21.
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M41T62, M41T64, M41T65 Part numbering 8 Part numbering Table 22. Ordering information scheme Example: M41T 62 Q 6 F Device family M41T Device type and supply voltage 62 = VCC = 1.3 V to 4.4 V 64 = VCC = 1.3 V to 4.4 V 65 = VCC = 1.3 V to 4.4 V Package Q = QFN16 (3 x 3 mm) LC = LCC8 (1.5 x 3.
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M41T62, M41T64, M41T65 Revision history Table 23. Document revision history Date 21-Feb-2013 Revision 20 Changes Updated title of datasheet; updated Section 3.8: "Century bits"; added Figure 21: "Century bits CB1 and CB0; moved and modified Table 8: "Examples using century bits"; added Section 3.9: "Leap year"; added footnote 1 to Table 15: "Crystals suitable for use with M41T6x series RTCs. Removed M41T63 part number and all references to it from document.
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M41T62, M41T64, M41T65 Contents Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 2.1 3 2-wire bus characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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M41T62, M41T64, M41T65 Contents 8 7.1 QFN16 carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7.2 LCC8 carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 7.3 Reel information for QFN16 and LCC8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Part numbering . . . . . . . . . . . . . . . .
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M41T62, M41T64, M41T65 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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M41T62, M41T64, M41T65 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. DS3840 - Rev 24 M41T62 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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M41T62, M41T64, M41T65 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.