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SG2525A

SG3525A

REGULATING PULSE WIDTH MODULATORS

8 TO 35 V OPERATION

5.1 V REFERENCE TRIMMED TO

1 %

100 Hz TO 500 KHz OSCILLATOR RANGE

SEPARATE OSCILLATOR SYNC TERMINAL

ADJUSTABLE DEADTIME CONTROL

INTERNAL SOFT-START

PULSE-BY-PULSE SHUTDOWN

INPUT UNDERVOLTAGE LOCKOUT WITH

HYSTERESIS

LATCHING PWM TO PREVENT MULTIPLE

PULSES

DUAL SOURCE/SINK OUTPUT DRIVERS

DESCRIPTION

The SG3525A series of pulse width modulator inte-

grated circuits are designed to offer improved per-

formance and lowered external parts count when

used in designing all types of switching power sup-

plies. The on-chip + 5.1 V reference is trimmed to

1 % and the input common-mode range of the error

amplifier includes the reference voltage eliminating

external resistors. A sync input to the oscillator al-

lows multiple units to be slaved or a single unit to be

synchronized to an external system clock. A single

resistor between the C

and the discharge terminals

provide a wide range of dead time ad- justment.

These devices also feature built-in soft-start circuitry

with only an external timing capacitor required. A

shutdown terminal controls both the soft-start circu-

ity and the output stages, providing instantaneous

turn off through the PWM latch with pulsed shut-

down, as well as soft-start recycle with longer shut-

down commands. These functions are also control-

led by an undervoltage lockout which keeps the out-

puts off and the soft-start capacitor discharged for

sub-normal input voltages. This lockout circuitry in-

cludes approximately 500 mV of hysteresis for jitter-

free operation. Another feature of these PWM cir-

cuits is a latch following the comparator. Once a

PWM pulses has been terminated for any reason,

the outputs will remain off for the duration of the pe-

riod. The latch is reset with each clock pulse. The

output stages are totem-pole designs capable of

sourcing or sinking in excess of 200 mA. The

SG3525A output stage features NOR logic, giving a

LOW output for an OFF state.

DIP16 16(Narrow)

Type Plastic DIP SO16

SG2525A SG2525AN SG2525AP

SG3525A SG3525AN SG3525AP

PIN CONNECTIONS AND ORDERING NUMBERS

(top view)

June 2000

1/12

Summary of content (12 pages)

PAGE 1
SG2525A SG3525A ® .. .. .. .. . . REGULATING PULSE WIDTH MODULATORS 8 TO 35 V OPERATION 5.
PAGE 2
SG2525A-SG3525A ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vi Supply Voltage 40 V VC Collector Supply Voltage 40 V IOSC Oscillator Charging Current Io Output Current, Source or Sink IR IT Reference Output Current Current through CT Terminal Logic Inputs Analog Inputs 5 mA 500 mA 50 5 – 0.3 to + 5.5 – 0.
PAGE 3
SG2525A-SG3525A ELECTRICAL CHARACTERISTICS (V# i = 20 V, and over operating temperature, unless otherwise specified) Symbol Parameter SG2525A Test Conditions SG3525A Unit Min. Typ. Max. Min. Typ. Max. 5.05 5.1 5.15 5 5.1 5.2 REFERENCE SECTION Tj = 25 °C VREF Output Voltage ∆VREF Line Regulation Vi = 8 to 35 V 10 20 10 20 mV ∆VREF Load Regulation IL = 0 to 20 mA 20 50 20 50 mV Over Operating Range 20 50 20 50 mV 5.25 V ∆VREF/∆T* Temp. Stability * * ∆VREF* 5 5.
PAGE 4
SG2525A-SG3525A ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter SG2525A Test Conditions Min. Typ. SG3525A Max. Min. Typ. Unit Max. PWM COMPARATOR Minimum Duty-cycle • Maximum Duty-cycle • Input Threshold * Input Bias Current 0 Zero Duty-cycle 0 % 45 49 45 49 % 0.7 0.9 0.7 0.9 V Maximum Duty-cycle 3.3 3.6 3.3 3.6 V 0.05 1 0.05 1 µA 50 80 50 80 µA 0.4 0.7 0.4 0.7 V 0.8 1 0.
PAGE 5
SG2525A-SG3525A TEST CIRCUIT 5/12
PAGE 6
SG2525A-SG3525A RECOMMENDED OPERATING CONDITIONS (•) Parameter Value Input Voltage (Vi) 8 to 35 V Collector Supply Voltage (VC) Sink/Source Load Current (steady state) 4.5 to 35 V 0 to 100 mA Sink/Source Load Current (peak) 0 to 400 mA Reference Load Current • 0 to 20 mA Oscillator Frequency Range Oscillator Timing Resistor 100 Hz to 400 KHz 2 KΩ to 150 KΩ Oscillator Timing Capacitor Dead Time Resistor Range 0.001 µF to 0.
PAGE 7
SG2525A-SG3525A Figure 5 : Error Amplifier. PRINCIPLES OF OPERATION SHUTDOWN OPTIONS (see Block Diagram) Since both the compensation and soft-start terminals (Pins 9 and 8) have current source pull-ups, either can readily accept a pull-down signal which only has to sink a maximum of 100 µA to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins.
PAGE 8
SG2525A-SG3525A Figure 6 : Oscillator Schematic. Figure 7 : Output Circuit (1/2 circuit shown).
PAGE 9
SG2525A-SG3525A Figure 8. Figure 9. For single-ended supplies, the driver outputs are grounded. The VC terminal is switched to ground by the totem-pole source transistors on alternate oscillator cycles. In conventional push-pull bipolar designs, forward base drive is controlled by R1 - R3. Rapid turn-off times for the power devices are achieved with speed-up capacitors C1 and C2. Figure 10. Figure 11.
PAGE 10
SG2525A-SG3525A mm DIM. MIN. a1 0.51 B 0.77 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L OUTLINE AND MECHANICAL DATA 3.3 0.130 DIP16 Z 10/12 1.27 0.
PAGE 11
SG2525A-SG3525A mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.25 a2 MAX. 0.069 0.004 0.009 1.6 0.063 b 0.35 0.46 0.014 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 c1 0.020 45˚ (typ.) D (1) 9.8 10 0.386 0.394 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F (1) 3.8 4 0.150 0.157 G 4.6 5.3 0.181 0.209 L 0.4 1.27 0.016 0.050 M S OUTLINE AND MECHANICAL DATA 0.62 0.024 SO16 Narrow 8˚(max.) (1) D and F do not include mold flash or protrusions.
PAGE 12
SG2525A-SG3525A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice.