Datasheet

ST7LITE0xY0, ST7LITESxY0

31/124

INTERRUPTS (Cont’d)

EXTERNAL INTERRUPT CONTROL REGISTER

(EICR)

Read/Write

Reset Value: 0000 0000 (00h)

Bit 7:6 = IS3[1:0] ei3 sensitivity

These bits define the interrupt sensitivity for ei3

(Port B0) according to Table 7.

Bit 5:4 = IS2[1:0] ei2 sensitivity

These bits define the interrupt sensitivity for ei2

(Port B3) according to Table 7.

Bit 3:2 = IS1[1:0] ei1 sensitivity

These bits define the interrupt sensitivity for ei1

(Port A7) according to Table 7.

Bit 1:0 = IS0[1:0] ei0 sensitivity

These bits define the interrupt sensitivity for ei0

(Port A0) according to Table 7.

Notes:

1. These 8 bits can be written only when the I bit in

the CC register is set.

2. Changing the sensitivity of a particular external

interrupt clears this pending interrupt. This can be

used to clear unwanted pending interrupts. Refer

to section “External interrupt function” on page 42.

Table 7. Interrupt Sensitivity Bits

IS31 IS30 IS21 IS20 IS11 IS10 IS01 IS00

ISx1 ISx0 External Interrupt Sensitivity

0 0 Falling edge & low level

0 1 Rising edge only

1 0 Falling edge only

1 1 Rising and falling edge